pac

down-the-stack/dk_pac/build.rs

@@ -0,0 +1,17 @@
+use std::env;
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+fn main() {
+    if env::var_os("CARGO_FEATURE_RT").is_some() {
+        let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+        File::create(out.join("device.x"))
+            .unwrap()
+            .write_all(include_bytes!("device.x"))
+            .unwrap();
+        println!("cargo:rustc-link-search={}", out.display());
+        println!("cargo:rerun-if-changed=device.x");
+    }
+    println!("cargo:rerun-if-changed=build.rs");
+}
+

down-the-stack/dk_pac/device.x

@@ -0,0 +1,38 @@
+PROVIDE(POWER_CLOCK = DefaultHandler);
+PROVIDE(RADIO = DefaultHandler);
+PROVIDE(UARTE0_UART0 = DefaultHandler);
+PROVIDE(SPIM0_SPIS0_TWIM0_TWIS0_SPI0_TWI0 = DefaultHandler);
+PROVIDE(SPIM1_SPIS1_TWIM1_TWIS1_SPI1_TWI1 = DefaultHandler);
+PROVIDE(NFCT = DefaultHandler);
+PROVIDE(GPIOTE = DefaultHandler);
+PROVIDE(SAADC = DefaultHandler);
+PROVIDE(TIMER0 = DefaultHandler);
+PROVIDE(TIMER1 = DefaultHandler);
+PROVIDE(TIMER2 = DefaultHandler);
+PROVIDE(RTC0 = DefaultHandler);
+PROVIDE(TEMP = DefaultHandler);
+PROVIDE(RNG = DefaultHandler);
+PROVIDE(ECB = DefaultHandler);
+PROVIDE(CCM_AAR = DefaultHandler);
+PROVIDE(WDT = DefaultHandler);
+PROVIDE(RTC1 = DefaultHandler);
+PROVIDE(QDEC = DefaultHandler);
+PROVIDE(COMP_LPCOMP = DefaultHandler);
+PROVIDE(SWI0_EGU0 = DefaultHandler);
+PROVIDE(SWI1_EGU1 = DefaultHandler);
+PROVIDE(SWI2_EGU2 = DefaultHandler);
+PROVIDE(SWI3_EGU3 = DefaultHandler);
+PROVIDE(SWI4_EGU4 = DefaultHandler);
+PROVIDE(SWI5_EGU5 = DefaultHandler);
+PROVIDE(TIMER3 = DefaultHandler);
+PROVIDE(TIMER4 = DefaultHandler);
+PROVIDE(PWM0 = DefaultHandler);
+PROVIDE(PDM = DefaultHandler);
+PROVIDE(MWU = DefaultHandler);
+PROVIDE(PWM1 = DefaultHandler);
+PROVIDE(PWM2 = DefaultHandler);
+PROVIDE(SPIM2_SPIS2_SPI2 = DefaultHandler);
+PROVIDE(RTC2 = DefaultHandler);
+PROVIDE(I2S = DefaultHandler);
+PROVIDE(FPU = DefaultHandler);
+

down-the-stack/dk_pac/src/aar.rs

@@ -0,0 +1,88 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start resolving addresses based on IRKs specified in the IRK data structure"]
+    pub tasks_start: TASKS_START,
+    _reserved1: [u8; 0x04],
+    #[doc = "0x08 - Stop resolving addresses"]
+    pub tasks_stop: TASKS_STOP,
+    _reserved2: [u8; 0xf4],
+    #[doc = "0x100 - Address resolution procedure complete"]
+    pub events_end: EVENTS_END,
+    #[doc = "0x104 - Address resolved"]
+    pub events_resolved: EVENTS_RESOLVED,
+    #[doc = "0x108 - Address not resolved"]
+    pub events_notresolved: EVENTS_NOTRESOLVED,
+    _reserved5: [u8; 0x01f8],
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved7: [u8; 0xf4],
+    #[doc = "0x400 - Resolution status"]
+    pub status: STATUS,
+    _reserved8: [u8; 0xfc],
+    #[doc = "0x500 - Enable AAR"]
+    pub enable: ENABLE,
+    #[doc = "0x504 - Number of IRKs"]
+    pub nirk: NIRK,
+    #[doc = "0x508 - Pointer to IRK data structure"]
+    pub irkptr: IRKPTR,
+    _reserved11: [u8; 0x04],
+    #[doc = "0x510 - Pointer to the resolvable address"]
+    pub addrptr: ADDRPTR,
+    #[doc = "0x514 - Pointer to data area used for temporary storage"]
+    pub scratchptr: SCRATCHPTR,
+}
+#[doc = "TASKS_START (w) register accessor: an alias for `Reg<TASKS_START_SPEC>`"]
+pub type TASKS_START = crate::Reg<tasks_start::TASKS_START_SPEC>;
+#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure"]
+pub mod tasks_start;
+#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
+pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
+#[doc = "Stop resolving addresses"]
+pub mod tasks_stop;
+#[doc = "EVENTS_END (rw) register accessor: an alias for `Reg<EVENTS_END_SPEC>`"]
+pub type EVENTS_END = crate::Reg<events_end::EVENTS_END_SPEC>;
+#[doc = "Address resolution procedure complete"]
+pub mod events_end;
+#[doc = "EVENTS_RESOLVED (rw) register accessor: an alias for `Reg<EVENTS_RESOLVED_SPEC>`"]
+pub type EVENTS_RESOLVED = crate::Reg<events_resolved::EVENTS_RESOLVED_SPEC>;
+#[doc = "Address resolved"]
+pub mod events_resolved;
+#[doc = "EVENTS_NOTRESOLVED (rw) register accessor: an alias for `Reg<EVENTS_NOTRESOLVED_SPEC>`"]
+pub type EVENTS_NOTRESOLVED = crate::Reg<events_notresolved::EVENTS_NOTRESOLVED_SPEC>;
+#[doc = "Address not resolved"]
+pub mod events_notresolved;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "STATUS (r) register accessor: an alias for `Reg<STATUS_SPEC>`"]
+pub type STATUS = crate::Reg<status::STATUS_SPEC>;
+#[doc = "Resolution status"]
+pub mod status;
+#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
+pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
+#[doc = "Enable AAR"]
+pub mod enable;
+#[doc = "NIRK (rw) register accessor: an alias for `Reg<NIRK_SPEC>`"]
+pub type NIRK = crate::Reg<nirk::NIRK_SPEC>;
+#[doc = "Number of IRKs"]
+pub mod nirk;
+#[doc = "IRKPTR (rw) register accessor: an alias for `Reg<IRKPTR_SPEC>`"]
+pub type IRKPTR = crate::Reg<irkptr::IRKPTR_SPEC>;
+#[doc = "Pointer to IRK data structure"]
+pub mod irkptr;
+#[doc = "ADDRPTR (rw) register accessor: an alias for `Reg<ADDRPTR_SPEC>`"]
+pub type ADDRPTR = crate::Reg<addrptr::ADDRPTR_SPEC>;
+#[doc = "Pointer to the resolvable address"]
+pub mod addrptr;
+#[doc = "SCRATCHPTR (rw) register accessor: an alias for `Reg<SCRATCHPTR_SPEC>`"]
+pub type SCRATCHPTR = crate::Reg<scratchptr::SCRATCHPTR_SPEC>;
+#[doc = "Pointer to data area used for temporary storage"]
+pub mod scratchptr;

down-the-stack/dk_pac/src/aar/addrptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `ADDRPTR` reader"]
+pub struct R(crate::R<ADDRPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ADDRPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ADDRPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ADDRPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ADDRPTR` writer"]
+pub struct W(crate::W<ADDRPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ADDRPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ADDRPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ADDRPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ADDRPTR` reader - Pointer to the resolvable address (6-bytes)"]
+pub type ADDRPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `ADDRPTR` writer - Pointer to the resolvable address (6-bytes)"]
+pub type ADDRPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ADDRPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to the resolvable address (6-bytes)"]
+    #[inline(always)]
+    pub fn addrptr(&self) -> ADDRPTR_R {
+        ADDRPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to the resolvable address (6-bytes)"]
+    #[inline(always)]
+    #[must_use]
+    pub fn addrptr(&mut self) -> ADDRPTR_W<0> {
+        ADDRPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to the resolvable address\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [addrptr](index.html) module"]
+pub struct ADDRPTR_SPEC;
+impl crate::RegisterSpec for ADDRPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [addrptr::R](R) reader structure"]
+impl crate::Readable for ADDRPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [addrptr::W](W) writer structure"]
+impl crate::Writable for ADDRPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ADDRPTR to value 0"]
+impl crate::Resettable for ADDRPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/enable.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable AAR"]
+pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
+#[doc = "Enable or disable AAR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "3: Enable"]
+    ENABLED = 3,
+}
+impl From<ENABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as _
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<ENABLE_A> {
+        match self.bits {
+            0 => Some(ENABLE_A::DISABLED),
+            3 => Some(ENABLE_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable AAR"]
+pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Enable or disable AAR"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Enable or disable AAR"]
+    #[inline(always)]
+    #[must_use]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable AAR\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/events_end.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_END` reader"]
+pub struct R(crate::R<EVENTS_END_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_END_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_END_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_END` writer"]
+pub struct W(crate::W<EVENTS_END_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_END_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_END_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_END_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_END` reader - Address resolution procedure complete"]
+pub type EVENTS_END_R = crate::BitReader<EVENTS_END_A>;
+#[doc = "Address resolution procedure complete\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_END_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_END_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_END_A {
+        match self.bits {
+            false => EVENTS_END_A::NOT_GENERATED,
+            true => EVENTS_END_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_END_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_END_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_END` writer - Address resolution procedure complete"]
+pub type EVENTS_END_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_END_SPEC, EVENTS_END_A, O>;
+impl<'a, const O: u8> EVENTS_END_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_END_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Address resolution procedure complete"]
+    #[inline(always)]
+    pub fn events_end(&self) -> EVENTS_END_R {
+        EVENTS_END_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Address resolution procedure complete"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_end(&mut self) -> EVENTS_END_W<0> {
+        EVENTS_END_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Address resolution procedure complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_end](index.html) module"]
+pub struct EVENTS_END_SPEC;
+impl crate::RegisterSpec for EVENTS_END_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_end::R](R) reader structure"]
+impl crate::Readable for EVENTS_END_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_end::W](W) writer structure"]
+impl crate::Writable for EVENTS_END_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_END to value 0"]
+impl crate::Resettable for EVENTS_END_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/events_notresolved.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_NOTRESOLVED` reader"]
+pub struct R(crate::R<EVENTS_NOTRESOLVED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_NOTRESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_NOTRESOLVED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_NOTRESOLVED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_NOTRESOLVED` writer"]
+pub struct W(crate::W<EVENTS_NOTRESOLVED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_NOTRESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_NOTRESOLVED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_NOTRESOLVED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_NOTRESOLVED` reader - Address not resolved"]
+pub type EVENTS_NOTRESOLVED_R = crate::BitReader<EVENTS_NOTRESOLVED_A>;
+#[doc = "Address not resolved\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_NOTRESOLVED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_NOTRESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_NOTRESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_NOTRESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_NOTRESOLVED_A {
+        match self.bits {
+            false => EVENTS_NOTRESOLVED_A::NOT_GENERATED,
+            true => EVENTS_NOTRESOLVED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_NOTRESOLVED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_NOTRESOLVED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_NOTRESOLVED` writer - Address not resolved"]
+pub type EVENTS_NOTRESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_NOTRESOLVED_SPEC, EVENTS_NOTRESOLVED_A, O>;
+impl<'a, const O: u8> EVENTS_NOTRESOLVED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_NOTRESOLVED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_NOTRESOLVED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Address not resolved"]
+    #[inline(always)]
+    pub fn events_notresolved(&self) -> EVENTS_NOTRESOLVED_R {
+        EVENTS_NOTRESOLVED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Address not resolved"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_notresolved(&mut self) -> EVENTS_NOTRESOLVED_W<0> {
+        EVENTS_NOTRESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Address not resolved\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_notresolved](index.html) module"]
+pub struct EVENTS_NOTRESOLVED_SPEC;
+impl crate::RegisterSpec for EVENTS_NOTRESOLVED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_notresolved::R](R) reader structure"]
+impl crate::Readable for EVENTS_NOTRESOLVED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_notresolved::W](W) writer structure"]
+impl crate::Writable for EVENTS_NOTRESOLVED_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_NOTRESOLVED to value 0"]
+impl crate::Resettable for EVENTS_NOTRESOLVED_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/events_resolved.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_RESOLVED` reader"]
+pub struct R(crate::R<EVENTS_RESOLVED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_RESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_RESOLVED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_RESOLVED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_RESOLVED` writer"]
+pub struct W(crate::W<EVENTS_RESOLVED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_RESOLVED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_RESOLVED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_RESOLVED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_RESOLVED` reader - Address resolved"]
+pub type EVENTS_RESOLVED_R = crate::BitReader<EVENTS_RESOLVED_A>;
+#[doc = "Address resolved\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_RESOLVED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_RESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_RESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_RESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_RESOLVED_A {
+        match self.bits {
+            false => EVENTS_RESOLVED_A::NOT_GENERATED,
+            true => EVENTS_RESOLVED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_RESOLVED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_RESOLVED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_RESOLVED` writer - Address resolved"]
+pub type EVENTS_RESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_RESOLVED_SPEC, EVENTS_RESOLVED_A, O>;
+impl<'a, const O: u8> EVENTS_RESOLVED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_RESOLVED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_RESOLVED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Address resolved"]
+    #[inline(always)]
+    pub fn events_resolved(&self) -> EVENTS_RESOLVED_R {
+        EVENTS_RESOLVED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Address resolved"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_resolved(&mut self) -> EVENTS_RESOLVED_W<0> {
+        EVENTS_RESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Address resolved\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_resolved](index.html) module"]
+pub struct EVENTS_RESOLVED_SPEC;
+impl crate::RegisterSpec for EVENTS_RESOLVED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_resolved::R](R) reader structure"]
+impl crate::Readable for EVENTS_RESOLVED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_resolved::W](W) writer structure"]
+impl crate::Writable for EVENTS_RESOLVED_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_RESOLVED to value 0"]
+impl crate::Resettable for EVENTS_RESOLVED_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/intenclr.rs

@@ -0,0 +1,270 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to disable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum END_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to disable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(END_AW::CLEAR)
+    }
+}
+#[doc = "Field `RESOLVED` reader - Write '1' to disable interrupt for event RESOLVED"]
+pub type RESOLVED_R = crate::BitReader<RESOLVED_A>;
+#[doc = "Write '1' to disable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum RESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<RESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl RESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RESOLVED_A {
+        match self.bits {
+            false => RESOLVED_A::DISABLED,
+            true => RESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == RESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == RESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum RESOLVED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<RESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `RESOLVED` writer - Write '1' to disable interrupt for event RESOLVED"]
+pub type RESOLVED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, RESOLVED_AW, O>;
+impl<'a, const O: u8> RESOLVED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(RESOLVED_AW::CLEAR)
+    }
+}
+#[doc = "Field `NOTRESOLVED` reader - Write '1' to disable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_R = crate::BitReader<NOTRESOLVED_A>;
+#[doc = "Write '1' to disable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum NOTRESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<NOTRESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl NOTRESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> NOTRESOLVED_A {
+        match self.bits {
+            false => NOTRESOLVED_A::DISABLED,
+            true => NOTRESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == NOTRESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == NOTRESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum NOTRESOLVED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<NOTRESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `NOTRESOLVED` writer - Write '1' to disable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, NOTRESOLVED_AW, O>;
+impl<'a, const O: u8> NOTRESOLVED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(NOTRESOLVED_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event RESOLVED"]
+    #[inline(always)]
+    pub fn resolved(&self) -> RESOLVED_R {
+        RESOLVED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    pub fn notresolved(&self) -> NOTRESOLVED_R {
+        NOTRESOLVED_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event END"]
+    #[inline(always)]
+    #[must_use]
+    pub fn end(&mut self) -> END_W<0> {
+        END_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event RESOLVED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn resolved(&mut self) -> RESOLVED_W<1> {
+        RESOLVED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn notresolved(&mut self) -> NOTRESOLVED_W<2> {
+        NOTRESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/intenset.rs

@@ -0,0 +1,270 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `END` reader - Write '1' to enable interrupt for event END"]
+pub type END_R = crate::BitReader<END_A>;
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum END_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<END_A> for bool {
+    #[inline(always)]
+    fn from(variant: END_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl END_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> END_A {
+        match self.bits {
+            false => END_A::DISABLED,
+            true => END_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == END_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == END_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event END\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum END_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<END_AW> for bool {
+    #[inline(always)]
+    fn from(variant: END_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `END` writer - Write '1' to enable interrupt for event END"]
+pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, END_AW, O>;
+impl<'a, const O: u8> END_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(END_AW::SET)
+    }
+}
+#[doc = "Field `RESOLVED` reader - Write '1' to enable interrupt for event RESOLVED"]
+pub type RESOLVED_R = crate::BitReader<RESOLVED_A>;
+#[doc = "Write '1' to enable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum RESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<RESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl RESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RESOLVED_A {
+        match self.bits {
+            false => RESOLVED_A::DISABLED,
+            true => RESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == RESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == RESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event RESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum RESOLVED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<RESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: RESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `RESOLVED` writer - Write '1' to enable interrupt for event RESOLVED"]
+pub type RESOLVED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, RESOLVED_AW, O>;
+impl<'a, const O: u8> RESOLVED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(RESOLVED_AW::SET)
+    }
+}
+#[doc = "Field `NOTRESOLVED` reader - Write '1' to enable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_R = crate::BitReader<NOTRESOLVED_A>;
+#[doc = "Write '1' to enable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum NOTRESOLVED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<NOTRESOLVED_A> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl NOTRESOLVED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> NOTRESOLVED_A {
+        match self.bits {
+            false => NOTRESOLVED_A::DISABLED,
+            true => NOTRESOLVED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == NOTRESOLVED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == NOTRESOLVED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum NOTRESOLVED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<NOTRESOLVED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: NOTRESOLVED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `NOTRESOLVED` writer - Write '1' to enable interrupt for event NOTRESOLVED"]
+pub type NOTRESOLVED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, NOTRESOLVED_AW, O>;
+impl<'a, const O: u8> NOTRESOLVED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(NOTRESOLVED_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    pub fn end(&self) -> END_R {
+        END_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event RESOLVED"]
+    #[inline(always)]
+    pub fn resolved(&self) -> RESOLVED_R {
+        RESOLVED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    pub fn notresolved(&self) -> NOTRESOLVED_R {
+        NOTRESOLVED_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event END"]
+    #[inline(always)]
+    #[must_use]
+    pub fn end(&mut self) -> END_W<0> {
+        END_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event RESOLVED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn resolved(&mut self) -> RESOLVED_W<1> {
+        RESOLVED_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event NOTRESOLVED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn notresolved(&mut self) -> NOTRESOLVED_W<2> {
+        NOTRESOLVED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/irkptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `IRKPTR` reader"]
+pub struct R(crate::R<IRKPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<IRKPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<IRKPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<IRKPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `IRKPTR` writer"]
+pub struct W(crate::W<IRKPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<IRKPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<IRKPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<IRKPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `IRKPTR` reader - Pointer to the IRK data structure"]
+pub type IRKPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `IRKPTR` writer - Pointer to the IRK data structure"]
+pub type IRKPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, IRKPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to the IRK data structure"]
+    #[inline(always)]
+    pub fn irkptr(&self) -> IRKPTR_R {
+        IRKPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to the IRK data structure"]
+    #[inline(always)]
+    #[must_use]
+    pub fn irkptr(&mut self) -> IRKPTR_W<0> {
+        IRKPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to IRK data structure\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [irkptr](index.html) module"]
+pub struct IRKPTR_SPEC;
+impl crate::RegisterSpec for IRKPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [irkptr::R](R) reader structure"]
+impl crate::Readable for IRKPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [irkptr::W](W) writer structure"]
+impl crate::Writable for IRKPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets IRKPTR to value 0"]
+impl crate::Resettable for IRKPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/nirk.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `NIRK` reader"]
+pub struct R(crate::R<NIRK_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<NIRK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<NIRK_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<NIRK_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `NIRK` writer"]
+pub struct W(crate::W<NIRK_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<NIRK_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<NIRK_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<NIRK_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `NIRK` reader - Number of Identity root keys available in the IRK data structure"]
+pub type NIRK_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `NIRK` writer - Number of Identity root keys available in the IRK data structure"]
+pub type NIRK_W<'a, const O: u8> = crate::FieldWriter<'a, u32, NIRK_SPEC, u8, u8, 5, O>;
+impl R {
+    #[doc = "Bits 0:4 - Number of Identity root keys available in the IRK data structure"]
+    #[inline(always)]
+    pub fn nirk(&self) -> NIRK_R {
+        NIRK_R::new((self.bits & 0x1f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:4 - Number of Identity root keys available in the IRK data structure"]
+    #[inline(always)]
+    #[must_use]
+    pub fn nirk(&mut self) -> NIRK_W<0> {
+        NIRK_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Number of IRKs\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [nirk](index.html) module"]
+pub struct NIRK_SPEC;
+impl crate::RegisterSpec for NIRK_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [nirk::R](R) reader structure"]
+impl crate::Readable for NIRK_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [nirk::W](W) writer structure"]
+impl crate::Writable for NIRK_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets NIRK to value 0x01"]
+impl crate::Resettable for NIRK_SPEC {
+    const RESET_VALUE: Self::Ux = 0x01;
+}

down-the-stack/dk_pac/src/aar/scratchptr.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `SCRATCHPTR` reader"]
+pub struct R(crate::R<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SCRATCHPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SCRATCHPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SCRATCHPTR` writer"]
+pub struct W(crate::W<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SCRATCHPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SCRATCHPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SCRATCHPTR` reader - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
+pub type SCRATCHPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `SCRATCHPTR` writer - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
+pub type SCRATCHPTR_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SCRATCHPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
+    #[inline(always)]
+    pub fn scratchptr(&self) -> SCRATCHPTR_R {
+        SCRATCHPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during resolution.A space of minimum 3 bytes must be reserved."]
+    #[inline(always)]
+    #[must_use]
+    pub fn scratchptr(&mut self) -> SCRATCHPTR_W<0> {
+        SCRATCHPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to data area used for temporary storage\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scratchptr](index.html) module"]
+pub struct SCRATCHPTR_SPEC;
+impl crate::RegisterSpec for SCRATCHPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [scratchptr::R](R) reader structure"]
+impl crate::Readable for SCRATCHPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [scratchptr::W](W) writer structure"]
+impl crate::Writable for SCRATCHPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets SCRATCHPTR to value 0"]
+impl crate::Resettable for SCRATCHPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/status.rs

@@ -0,0 +1,37 @@
+#[doc = "Register `STATUS` reader"]
+pub struct R(crate::R<STATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<STATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<STATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<STATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - The IRK that was used last time an address was resolved"]
+pub type STATUS_R = crate::FieldReader<u8, u8>;
+impl R {
+    #[doc = "Bits 0:3 - The IRK that was used last time an address was resolved"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 0x0f) as u8)
+    }
+}
+#[doc = "Resolution status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [status](index.html) module"]
+pub struct STATUS_SPEC;
+impl crate::RegisterSpec for STATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [status::R](R) reader structure"]
+impl crate::Readable for STATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets STATUS to value 0"]
+impl crate::Resettable for STATUS_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/tasks_start.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_START` writer"]
+pub struct W(crate::W<TASKS_START_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_START_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_START_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_START_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_START_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_START_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_START` writer - Start resolving addresses based on IRKs specified in the IRK data structure"]
+pub type TASKS_START_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_START_SPEC, TASKS_START_AW, O>;
+impl<'a, const O: u8> TASKS_START_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_START_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start resolving addresses based on IRKs specified in the IRK data structure"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_start(&mut self) -> TASKS_START_W<0> {
+        TASKS_START_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start resolving addresses based on IRKs specified in the IRK data structure\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_start](index.html) module"]
+pub struct TASKS_START_SPEC;
+impl crate::RegisterSpec for TASKS_START_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_start::W](W) writer structure"]
+impl crate::Writable for TASKS_START_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_START to value 0"]
+impl crate::Resettable for TASKS_START_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/aar/tasks_stop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOP` writer"]
+pub struct W(crate::W<TASKS_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop resolving addresses\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_STOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOP` writer - Stop resolving addresses"]
+pub type TASKS_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOP_SPEC, TASKS_STOP_AW, O>;
+impl<'a, const O: u8> TASKS_STOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop resolving addresses"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
+        TASKS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop resolving addresses\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
+pub struct TASKS_STOP_SPEC;
+impl crate::RegisterSpec for TASKS_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
+impl crate::Writable for TASKS_STOP_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_STOP to value 0"]
+impl crate::Resettable for TASKS_STOP_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/approtect.rs

@@ -0,0 +1,18 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0x0550],
+    #[doc = "0x550 - Software force enable APPROTECT mechanism until next reset. This register can only be written once."]
+    pub forceprotect: FORCEPROTECT,
+    _reserved1: [u8; 0x04],
+    #[doc = "0x558 - Software disable APPROTECT mechanism"]
+    pub disable: DISABLE,
+}
+#[doc = "FORCEPROTECT (rw) register accessor: an alias for `Reg<FORCEPROTECT_SPEC>`"]
+pub type FORCEPROTECT = crate::Reg<forceprotect::FORCEPROTECT_SPEC>;
+#[doc = "Software force enable APPROTECT mechanism until next reset. This register can only be written once."]
+pub mod forceprotect;
+#[doc = "DISABLE (rw) register accessor: an alias for `Reg<DISABLE_SPEC>`"]
+pub type DISABLE = crate::Reg<disable::DISABLE_SPEC>;
+#[doc = "Software disable APPROTECT mechanism"]
+pub mod disable;

down-the-stack/dk_pac/src/approtect/disable.rs

@@ -0,0 +1,116 @@
+#[doc = "Register `DISABLE` reader"]
+pub struct R(crate::R<DISABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DISABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DISABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DISABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DISABLE` writer"]
+pub struct W(crate::W<DISABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DISABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DISABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DISABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DISABLE` reader - Software disable APPROTECT mechanism"]
+pub type DISABLE_R = crate::FieldReader<u8, DISABLE_A>;
+#[doc = "Software disable APPROTECT mechanism\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum DISABLE_A {
+    #[doc = "90: Software disable APPROTECT mechanism"]
+    SW_DISABLE = 90,
+}
+impl From<DISABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: DISABLE_A) -> Self {
+        variant as _
+    }
+}
+impl DISABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<DISABLE_A> {
+        match self.bits {
+            90 => Some(DISABLE_A::SW_DISABLE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `SW_DISABLE`"]
+    #[inline(always)]
+    pub fn is_sw_disable(&self) -> bool {
+        *self == DISABLE_A::SW_DISABLE
+    }
+}
+#[doc = "Field `DISABLE` writer - Software disable APPROTECT mechanism"]
+pub type DISABLE_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, DISABLE_SPEC, u8, DISABLE_A, 8, O>;
+impl<'a, const O: u8> DISABLE_W<'a, O> {
+    #[doc = "Software disable APPROTECT mechanism"]
+    #[inline(always)]
+    pub fn sw_disable(self) -> &'a mut W {
+        self.variant(DISABLE_A::SW_DISABLE)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Software disable APPROTECT mechanism"]
+    #[inline(always)]
+    pub fn disable(&self) -> DISABLE_R {
+        DISABLE_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Software disable APPROTECT mechanism"]
+    #[inline(always)]
+    #[must_use]
+    pub fn disable(&mut self) -> DISABLE_W<0> {
+        DISABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Software disable APPROTECT mechanism\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [disable](index.html) module"]
+pub struct DISABLE_SPEC;
+impl crate::RegisterSpec for DISABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [disable::R](R) reader structure"]
+impl crate::Readable for DISABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [disable::W](W) writer structure"]
+impl crate::Writable for DISABLE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets DISABLE to value 0"]
+impl crate::Resettable for DISABLE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/approtect/forceprotect.rs

@@ -0,0 +1,116 @@
+#[doc = "Register `FORCEPROTECT` reader"]
+pub struct R(crate::R<FORCEPROTECT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<FORCEPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<FORCEPROTECT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<FORCEPROTECT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `FORCEPROTECT` writer"]
+pub struct W(crate::W<FORCEPROTECT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<FORCEPROTECT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<FORCEPROTECT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<FORCEPROTECT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `FORCEPROTECT` reader - Write 0x0 to force enable APPROTECT mechanism"]
+pub type FORCEPROTECT_R = crate::FieldReader<u8, FORCEPROTECT_A>;
+#[doc = "Write 0x0 to force enable APPROTECT mechanism\n\nValue on reset: 255"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum FORCEPROTECT_A {
+    #[doc = "0: Software force enable APPROTECT mechanism"]
+    FORCE = 0,
+}
+impl From<FORCEPROTECT_A> for u8 {
+    #[inline(always)]
+    fn from(variant: FORCEPROTECT_A) -> Self {
+        variant as _
+    }
+}
+impl FORCEPROTECT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<FORCEPROTECT_A> {
+        match self.bits {
+            0 => Some(FORCEPROTECT_A::FORCE),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `FORCE`"]
+    #[inline(always)]
+    pub fn is_force(&self) -> bool {
+        *self == FORCEPROTECT_A::FORCE
+    }
+}
+#[doc = "Field `FORCEPROTECT` writer - Write 0x0 to force enable APPROTECT mechanism"]
+pub type FORCEPROTECT_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, FORCEPROTECT_SPEC, u8, FORCEPROTECT_A, 8, O>;
+impl<'a, const O: u8> FORCEPROTECT_W<'a, O> {
+    #[doc = "Software force enable APPROTECT mechanism"]
+    #[inline(always)]
+    pub fn force(self) -> &'a mut W {
+        self.variant(FORCEPROTECT_A::FORCE)
+    }
+}
+impl R {
+    #[doc = "Bits 0:7 - Write 0x0 to force enable APPROTECT mechanism"]
+    #[inline(always)]
+    pub fn forceprotect(&self) -> FORCEPROTECT_R {
+        FORCEPROTECT_R::new((self.bits & 0xff) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:7 - Write 0x0 to force enable APPROTECT mechanism"]
+    #[inline(always)]
+    #[must_use]
+    pub fn forceprotect(&mut self) -> FORCEPROTECT_W<0> {
+        FORCEPROTECT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Software force enable APPROTECT mechanism until next reset. This register can only be written once.\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [forceprotect](index.html) module"]
+pub struct FORCEPROTECT_SPEC;
+impl crate::RegisterSpec for FORCEPROTECT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [forceprotect::R](R) reader structure"]
+impl crate::Readable for FORCEPROTECT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [forceprotect::W](W) writer structure"]
+impl crate::Writable for FORCEPROTECT_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets FORCEPROTECT to value 0xffff_ffff"]
+impl crate::Resettable for FORCEPROTECT_SPEC {
+    const RESET_VALUE: Self::Ux = 0xffff_ffff;
+}

down-the-stack/dk_pac/src/bprot.rs

@@ -0,0 +1,36 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0x0600],
+    #[doc = "0x600 - Block protect configuration register 0"]
+    pub config0: CONFIG0,
+    #[doc = "0x604 - Block protect configuration register 1"]
+    pub config1: CONFIG1,
+    #[doc = "0x608 - Disable protection mechanism in debug interface mode"]
+    pub disableindebug: DISABLEINDEBUG,
+    _reserved3: [u8; 0x04],
+    #[doc = "0x610 - Block protect configuration register 2"]
+    pub config2: CONFIG2,
+    #[doc = "0x614 - Block protect configuration register 3"]
+    pub config3: CONFIG3,
+}
+#[doc = "CONFIG0 (rw) register accessor: an alias for `Reg<CONFIG0_SPEC>`"]
+pub type CONFIG0 = crate::Reg<config0::CONFIG0_SPEC>;
+#[doc = "Block protect configuration register 0"]
+pub mod config0;
+#[doc = "CONFIG1 (rw) register accessor: an alias for `Reg<CONFIG1_SPEC>`"]
+pub type CONFIG1 = crate::Reg<config1::CONFIG1_SPEC>;
+#[doc = "Block protect configuration register 1"]
+pub mod config1;
+#[doc = "DISABLEINDEBUG (rw) register accessor: an alias for `Reg<DISABLEINDEBUG_SPEC>`"]
+pub type DISABLEINDEBUG = crate::Reg<disableindebug::DISABLEINDEBUG_SPEC>;
+#[doc = "Disable protection mechanism in debug interface mode"]
+pub mod disableindebug;
+#[doc = "CONFIG2 (rw) register accessor: an alias for `Reg<CONFIG2_SPEC>`"]
+pub type CONFIG2 = crate::Reg<config2::CONFIG2_SPEC>;
+#[doc = "Block protect configuration register 2"]
+pub mod config2;
+#[doc = "CONFIG3 (rw) register accessor: an alias for `Reg<CONFIG3_SPEC>`"]
+pub type CONFIG3 = crate::Reg<config3::CONFIG3_SPEC>;
+#[doc = "Block protect configuration register 3"]
+pub mod config3;

down-the-stack/dk_pac/src/bprot/disableindebug.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `DISABLEINDEBUG` reader"]
+pub struct R(crate::R<DISABLEINDEBUG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<DISABLEINDEBUG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<DISABLEINDEBUG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<DISABLEINDEBUG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `DISABLEINDEBUG` writer"]
+pub struct W(crate::W<DISABLEINDEBUG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<DISABLEINDEBUG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<DISABLEINDEBUG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<DISABLEINDEBUG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `DISABLEINDEBUG` reader - Disable the protection mechanism for NVM regions while in debug interface mode. This register will only disable the protection mechanism if the device is in debug interface mode."]
+pub type DISABLEINDEBUG_R = crate::BitReader<DISABLEINDEBUG_A>;
+#[doc = "Disable the protection mechanism for NVM regions while in debug interface mode. This register will only disable the protection mechanism if the device is in debug interface mode.\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DISABLEINDEBUG_A {
+    #[doc = "1: Disable in debug"]
+    DISABLED = 1,
+    #[doc = "0: Enable in debug"]
+    ENABLED = 0,
+}
+impl From<DISABLEINDEBUG_A> for bool {
+    #[inline(always)]
+    fn from(variant: DISABLEINDEBUG_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DISABLEINDEBUG_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DISABLEINDEBUG_A {
+        match self.bits {
+            true => DISABLEINDEBUG_A::DISABLED,
+            false => DISABLEINDEBUG_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DISABLEINDEBUG_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DISABLEINDEBUG_A::ENABLED
+    }
+}
+#[doc = "Field `DISABLEINDEBUG` writer - Disable the protection mechanism for NVM regions while in debug interface mode. This register will only disable the protection mechanism if the device is in debug interface mode."]
+pub type DISABLEINDEBUG_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, DISABLEINDEBUG_SPEC, DISABLEINDEBUG_A, O>;
+impl<'a, const O: u8> DISABLEINDEBUG_W<'a, O> {
+    #[doc = "Disable in debug"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DISABLEINDEBUG_A::DISABLED)
+    }
+    #[doc = "Enable in debug"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DISABLEINDEBUG_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Disable the protection mechanism for NVM regions while in debug interface mode. This register will only disable the protection mechanism if the device is in debug interface mode."]
+    #[inline(always)]
+    pub fn disableindebug(&self) -> DISABLEINDEBUG_R {
+        DISABLEINDEBUG_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Disable the protection mechanism for NVM regions while in debug interface mode. This register will only disable the protection mechanism if the device is in debug interface mode."]
+    #[inline(always)]
+    #[must_use]
+    pub fn disableindebug(&mut self) -> DISABLEINDEBUG_W<0> {
+        DISABLEINDEBUG_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable protection mechanism in debug interface mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [disableindebug](index.html) module"]
+pub struct DISABLEINDEBUG_SPEC;
+impl crate::RegisterSpec for DISABLEINDEBUG_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [disableindebug::R](R) reader structure"]
+impl crate::Readable for DISABLEINDEBUG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [disableindebug::W](W) writer structure"]
+impl crate::Writable for DISABLEINDEBUG_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets DISABLEINDEBUG to value 0x01"]
+impl crate::Resettable for DISABLEINDEBUG_SPEC {
+    const RESET_VALUE: Self::Ux = 0x01;
+}

down-the-stack/dk_pac/src/ccm.rs

@@ -0,0 +1,105 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start generation of key-stream. This operation will stop by itself when completed."]
+    pub tasks_ksgen: TASKS_KSGEN,
+    #[doc = "0x04 - Start encryption/decryption. This operation will stop by itself when completed."]
+    pub tasks_crypt: TASKS_CRYPT,
+    #[doc = "0x08 - Stop encryption/decryption"]
+    pub tasks_stop: TASKS_STOP,
+    _reserved3: [u8; 0xf4],
+    #[doc = "0x100 - Key-stream generation complete"]
+    pub events_endksgen: EVENTS_ENDKSGEN,
+    #[doc = "0x104 - Encrypt/decrypt complete"]
+    pub events_endcrypt: EVENTS_ENDCRYPT,
+    #[doc = "0x108 - CCM error event"]
+    pub events_error: EVENTS_ERROR,
+    _reserved6: [u8; 0xf4],
+    #[doc = "0x200 - Shortcuts between local events and tasks"]
+    pub shorts: SHORTS,
+    _reserved7: [u8; 0x0100],
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved9: [u8; 0xf4],
+    #[doc = "0x400 - MIC check result"]
+    pub micstatus: MICSTATUS,
+    _reserved10: [u8; 0xfc],
+    #[doc = "0x500 - Enable"]
+    pub enable: ENABLE,
+    #[doc = "0x504 - Operation mode"]
+    pub mode: MODE,
+    #[doc = "0x508 - Pointer to data structure holding AES key and NONCE vector"]
+    pub cnfptr: CNFPTR,
+    #[doc = "0x50c - Input pointer"]
+    pub inptr: INPTR,
+    #[doc = "0x510 - Output pointer"]
+    pub outptr: OUTPTR,
+    #[doc = "0x514 - Pointer to data area used for temporary storage"]
+    pub scratchptr: SCRATCHPTR,
+}
+#[doc = "TASKS_KSGEN (w) register accessor: an alias for `Reg<TASKS_KSGEN_SPEC>`"]
+pub type TASKS_KSGEN = crate::Reg<tasks_ksgen::TASKS_KSGEN_SPEC>;
+#[doc = "Start generation of key-stream. This operation will stop by itself when completed."]
+pub mod tasks_ksgen;
+#[doc = "TASKS_CRYPT (w) register accessor: an alias for `Reg<TASKS_CRYPT_SPEC>`"]
+pub type TASKS_CRYPT = crate::Reg<tasks_crypt::TASKS_CRYPT_SPEC>;
+#[doc = "Start encryption/decryption. This operation will stop by itself when completed."]
+pub mod tasks_crypt;
+#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
+pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
+#[doc = "Stop encryption/decryption"]
+pub mod tasks_stop;
+#[doc = "EVENTS_ENDKSGEN (rw) register accessor: an alias for `Reg<EVENTS_ENDKSGEN_SPEC>`"]
+pub type EVENTS_ENDKSGEN = crate::Reg<events_endksgen::EVENTS_ENDKSGEN_SPEC>;
+#[doc = "Key-stream generation complete"]
+pub mod events_endksgen;
+#[doc = "EVENTS_ENDCRYPT (rw) register accessor: an alias for `Reg<EVENTS_ENDCRYPT_SPEC>`"]
+pub type EVENTS_ENDCRYPT = crate::Reg<events_endcrypt::EVENTS_ENDCRYPT_SPEC>;
+#[doc = "Encrypt/decrypt complete"]
+pub mod events_endcrypt;
+#[doc = "EVENTS_ERROR (rw) register accessor: an alias for `Reg<EVENTS_ERROR_SPEC>`"]
+pub type EVENTS_ERROR = crate::Reg<events_error::EVENTS_ERROR_SPEC>;
+#[doc = "CCM error event"]
+pub mod events_error;
+#[doc = "SHORTS (rw) register accessor: an alias for `Reg<SHORTS_SPEC>`"]
+pub type SHORTS = crate::Reg<shorts::SHORTS_SPEC>;
+#[doc = "Shortcuts between local events and tasks"]
+pub mod shorts;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "MICSTATUS (r) register accessor: an alias for `Reg<MICSTATUS_SPEC>`"]
+pub type MICSTATUS = crate::Reg<micstatus::MICSTATUS_SPEC>;
+#[doc = "MIC check result"]
+pub mod micstatus;
+#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
+pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
+#[doc = "Enable"]
+pub mod enable;
+#[doc = "MODE (rw) register accessor: an alias for `Reg<MODE_SPEC>`"]
+pub type MODE = crate::Reg<mode::MODE_SPEC>;
+#[doc = "Operation mode"]
+pub mod mode;
+#[doc = "CNFPTR (rw) register accessor: an alias for `Reg<CNFPTR_SPEC>`"]
+pub type CNFPTR = crate::Reg<cnfptr::CNFPTR_SPEC>;
+#[doc = "Pointer to data structure holding AES key and NONCE vector"]
+pub mod cnfptr;
+#[doc = "INPTR (rw) register accessor: an alias for `Reg<INPTR_SPEC>`"]
+pub type INPTR = crate::Reg<inptr::INPTR_SPEC>;
+#[doc = "Input pointer"]
+pub mod inptr;
+#[doc = "OUTPTR (rw) register accessor: an alias for `Reg<OUTPTR_SPEC>`"]
+pub type OUTPTR = crate::Reg<outptr::OUTPTR_SPEC>;
+#[doc = "Output pointer"]
+pub mod outptr;
+#[doc = "SCRATCHPTR (rw) register accessor: an alias for `Reg<SCRATCHPTR_SPEC>`"]
+pub type SCRATCHPTR = crate::Reg<scratchptr::SCRATCHPTR_SPEC>;
+#[doc = "Pointer to data area used for temporary storage"]
+pub mod scratchptr;

down-the-stack/dk_pac/src/ccm/cnfptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `CNFPTR` reader"]
+pub struct R(crate::R<CNFPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CNFPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CNFPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CNFPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CNFPTR` writer"]
+pub struct W(crate::W<CNFPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CNFPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CNFPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CNFPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CNFPTR` reader - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
+pub type CNFPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `CNFPTR` writer - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
+pub type CNFPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CNFPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
+    #[inline(always)]
+    pub fn cnfptr(&self) -> CNFPTR_R {
+        CNFPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to the data structure holding the AES key and the CCM NONCE vector (see Table 1 CCM data structure overview)"]
+    #[inline(always)]
+    #[must_use]
+    pub fn cnfptr(&mut self) -> CNFPTR_W<0> {
+        CNFPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to data structure holding AES key and NONCE vector\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [cnfptr](index.html) module"]
+pub struct CNFPTR_SPEC;
+impl crate::RegisterSpec for CNFPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [cnfptr::R](R) reader structure"]
+impl crate::Readable for CNFPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [cnfptr::W](W) writer structure"]
+impl crate::Writable for CNFPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets CNFPTR to value 0"]
+impl crate::Resettable for CNFPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/enable.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable CCM"]
+pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
+#[doc = "Enable or disable CCM\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "2: Enable"]
+    ENABLED = 2,
+}
+impl From<ENABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as _
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<ENABLE_A> {
+        match self.bits {
+            0 => Some(ENABLE_A::DISABLED),
+            2 => Some(ENABLE_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable CCM"]
+pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Enable or disable CCM"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Enable or disable CCM"]
+    #[inline(always)]
+    #[must_use]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/events_endcrypt.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ENDCRYPT` reader"]
+pub struct R(crate::R<EVENTS_ENDCRYPT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ENDCRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ENDCRYPT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ENDCRYPT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ENDCRYPT` writer"]
+pub struct W(crate::W<EVENTS_ENDCRYPT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ENDCRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ENDCRYPT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ENDCRYPT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ENDCRYPT` reader - Encrypt/decrypt complete"]
+pub type EVENTS_ENDCRYPT_R = crate::BitReader<EVENTS_ENDCRYPT_A>;
+#[doc = "Encrypt/decrypt complete\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_ENDCRYPT_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ENDCRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ENDCRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ENDCRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ENDCRYPT_A {
+        match self.bits {
+            false => EVENTS_ENDCRYPT_A::NOT_GENERATED,
+            true => EVENTS_ENDCRYPT_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ENDCRYPT_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ENDCRYPT_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ENDCRYPT` writer - Encrypt/decrypt complete"]
+pub type EVENTS_ENDCRYPT_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ENDCRYPT_SPEC, EVENTS_ENDCRYPT_A, O>;
+impl<'a, const O: u8> EVENTS_ENDCRYPT_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDCRYPT_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDCRYPT_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Encrypt/decrypt complete"]
+    #[inline(always)]
+    pub fn events_endcrypt(&self) -> EVENTS_ENDCRYPT_R {
+        EVENTS_ENDCRYPT_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Encrypt/decrypt complete"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_endcrypt(&mut self) -> EVENTS_ENDCRYPT_W<0> {
+        EVENTS_ENDCRYPT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Encrypt/decrypt complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endcrypt](index.html) module"]
+pub struct EVENTS_ENDCRYPT_SPEC;
+impl crate::RegisterSpec for EVENTS_ENDCRYPT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_endcrypt::R](R) reader structure"]
+impl crate::Readable for EVENTS_ENDCRYPT_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_endcrypt::W](W) writer structure"]
+impl crate::Writable for EVENTS_ENDCRYPT_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_ENDCRYPT to value 0"]
+impl crate::Resettable for EVENTS_ENDCRYPT_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/events_endksgen.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ENDKSGEN` reader"]
+pub struct R(crate::R<EVENTS_ENDKSGEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ENDKSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ENDKSGEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ENDKSGEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ENDKSGEN` writer"]
+pub struct W(crate::W<EVENTS_ENDKSGEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ENDKSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ENDKSGEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ENDKSGEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ENDKSGEN` reader - Key-stream generation complete"]
+pub type EVENTS_ENDKSGEN_R = crate::BitReader<EVENTS_ENDKSGEN_A>;
+#[doc = "Key-stream generation complete\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_ENDKSGEN_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ENDKSGEN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ENDKSGEN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ENDKSGEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ENDKSGEN_A {
+        match self.bits {
+            false => EVENTS_ENDKSGEN_A::NOT_GENERATED,
+            true => EVENTS_ENDKSGEN_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ENDKSGEN_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ENDKSGEN_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ENDKSGEN` writer - Key-stream generation complete"]
+pub type EVENTS_ENDKSGEN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ENDKSGEN_SPEC, EVENTS_ENDKSGEN_A, O>;
+impl<'a, const O: u8> EVENTS_ENDKSGEN_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDKSGEN_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDKSGEN_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Key-stream generation complete"]
+    #[inline(always)]
+    pub fn events_endksgen(&self) -> EVENTS_ENDKSGEN_R {
+        EVENTS_ENDKSGEN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Key-stream generation complete"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_endksgen(&mut self) -> EVENTS_ENDKSGEN_W<0> {
+        EVENTS_ENDKSGEN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Key-stream generation complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endksgen](index.html) module"]
+pub struct EVENTS_ENDKSGEN_SPEC;
+impl crate::RegisterSpec for EVENTS_ENDKSGEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_endksgen::R](R) reader structure"]
+impl crate::Readable for EVENTS_ENDKSGEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_endksgen::W](W) writer structure"]
+impl crate::Writable for EVENTS_ENDKSGEN_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_ENDKSGEN to value 0"]
+impl crate::Resettable for EVENTS_ENDKSGEN_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/events_error.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ERROR` reader"]
+pub struct R(crate::R<EVENTS_ERROR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ERROR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ERROR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ERROR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ERROR` writer"]
+pub struct W(crate::W<EVENTS_ERROR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ERROR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ERROR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ERROR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ERROR` reader - CCM error event"]
+pub type EVENTS_ERROR_R = crate::BitReader<EVENTS_ERROR_A>;
+#[doc = "CCM error event\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_ERROR_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ERROR_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ERROR_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ERROR_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ERROR_A {
+        match self.bits {
+            false => EVENTS_ERROR_A::NOT_GENERATED,
+            true => EVENTS_ERROR_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ERROR_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ERROR_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ERROR` writer - CCM error event"]
+pub type EVENTS_ERROR_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ERROR_SPEC, EVENTS_ERROR_A, O>;
+impl<'a, const O: u8> EVENTS_ERROR_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ERROR_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ERROR_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - CCM error event"]
+    #[inline(always)]
+    pub fn events_error(&self) -> EVENTS_ERROR_R {
+        EVENTS_ERROR_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - CCM error event"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_error(&mut self) -> EVENTS_ERROR_W<0> {
+        EVENTS_ERROR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "CCM error event\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_error](index.html) module"]
+pub struct EVENTS_ERROR_SPEC;
+impl crate::RegisterSpec for EVENTS_ERROR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_error::R](R) reader structure"]
+impl crate::Readable for EVENTS_ERROR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_error::W](W) writer structure"]
+impl crate::Writable for EVENTS_ERROR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_ERROR to value 0"]
+impl crate::Resettable for EVENTS_ERROR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/inptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `INPTR` reader"]
+pub struct R(crate::R<INPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INPTR` writer"]
+pub struct W(crate::W<INPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `INPTR` reader - Input pointer"]
+pub type INPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `INPTR` writer - Input pointer"]
+pub type INPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, INPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Input pointer"]
+    #[inline(always)]
+    pub fn inptr(&self) -> INPTR_R {
+        INPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Input pointer"]
+    #[inline(always)]
+    #[must_use]
+    pub fn inptr(&mut self) -> INPTR_W<0> {
+        INPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Input pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inptr](index.html) module"]
+pub struct INPTR_SPEC;
+impl crate::RegisterSpec for INPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inptr::R](R) reader structure"]
+impl crate::Readable for INPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inptr::W](W) writer structure"]
+impl crate::Writable for INPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INPTR to value 0"]
+impl crate::Resettable for INPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/intenclr.rs

@@ -0,0 +1,269 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDKSGEN` reader - Write '1' to disable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_R = crate::BitReader<ENDKSGEN_A>;
+#[doc = "Write '1' to disable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDKSGEN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDKSGEN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDKSGEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDKSGEN_A {
+        match self.bits {
+            false => ENDKSGEN_A::DISABLED,
+            true => ENDKSGEN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDKSGEN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDKSGEN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDKSGEN_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ENDKSGEN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDKSGEN` writer - Write '1' to disable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDKSGEN_AW, O>;
+impl<'a, const O: u8> ENDKSGEN_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ENDKSGEN_AW::CLEAR)
+    }
+}
+#[doc = "Field `ENDCRYPT` reader - Write '1' to disable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_R = crate::BitReader<ENDCRYPT_A>;
+#[doc = "Write '1' to disable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDCRYPT_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDCRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDCRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDCRYPT_A {
+        match self.bits {
+            false => ENDCRYPT_A::DISABLED,
+            true => ENDCRYPT_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDCRYPT_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDCRYPT_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDCRYPT_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ENDCRYPT_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDCRYPT` writer - Write '1' to disable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDCRYPT_AW, O>;
+impl<'a, const O: u8> ENDCRYPT_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ENDCRYPT_AW::CLEAR)
+    }
+}
+#[doc = "Field `ERROR` reader - Write '1' to disable interrupt for event ERROR"]
+pub type ERROR_R = crate::BitReader<ERROR_A>;
+#[doc = "Write '1' to disable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERROR_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ERROR_A> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ERROR_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ERROR_A {
+        match self.bits {
+            false => ERROR_A::DISABLED,
+            true => ERROR_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ERROR_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ERROR_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERROR_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ERROR_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ERROR` writer - Write '1' to disable interrupt for event ERROR"]
+pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ERROR_AW, O>;
+impl<'a, const O: u8> ERROR_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ERROR_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    pub fn endksgen(&self) -> ENDKSGEN_R {
+        ENDKSGEN_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    pub fn endcrypt(&self) -> ENDCRYPT_R {
+        ENDCRYPT_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event ERROR"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    #[must_use]
+    pub fn endksgen(&mut self) -> ENDKSGEN_W<0> {
+        ENDKSGEN_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    #[must_use]
+    pub fn endcrypt(&mut self) -> ENDCRYPT_W<1> {
+        ENDCRYPT_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event ERROR"]
+    #[inline(always)]
+    #[must_use]
+    pub fn error(&mut self) -> ERROR_W<2> {
+        ERROR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/intenset.rs

@@ -0,0 +1,269 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDKSGEN` reader - Write '1' to enable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_R = crate::BitReader<ENDKSGEN_A>;
+#[doc = "Write '1' to enable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDKSGEN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDKSGEN_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDKSGEN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDKSGEN_A {
+        match self.bits {
+            false => ENDKSGEN_A::DISABLED,
+            true => ENDKSGEN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDKSGEN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDKSGEN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ENDKSGEN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDKSGEN_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ENDKSGEN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDKSGEN` writer - Write '1' to enable interrupt for event ENDKSGEN"]
+pub type ENDKSGEN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDKSGEN_AW, O>;
+impl<'a, const O: u8> ENDKSGEN_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ENDKSGEN_AW::SET)
+    }
+}
+#[doc = "Field `ENDCRYPT` reader - Write '1' to enable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_R = crate::BitReader<ENDCRYPT_A>;
+#[doc = "Write '1' to enable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDCRYPT_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDCRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDCRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDCRYPT_A {
+        match self.bits {
+            false => ENDCRYPT_A::DISABLED,
+            true => ENDCRYPT_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDCRYPT_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDCRYPT_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ENDCRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDCRYPT_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ENDCRYPT_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDCRYPT_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDCRYPT` writer - Write '1' to enable interrupt for event ENDCRYPT"]
+pub type ENDCRYPT_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDCRYPT_AW, O>;
+impl<'a, const O: u8> ENDCRYPT_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ENDCRYPT_AW::SET)
+    }
+}
+#[doc = "Field `ERROR` reader - Write '1' to enable interrupt for event ERROR"]
+pub type ERROR_R = crate::BitReader<ERROR_A>;
+#[doc = "Write '1' to enable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERROR_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ERROR_A> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ERROR_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ERROR_A {
+        match self.bits {
+            false => ERROR_A::DISABLED,
+            true => ERROR_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ERROR_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ERROR_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ERROR\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERROR_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ERROR_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ERROR_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ERROR` writer - Write '1' to enable interrupt for event ERROR"]
+pub type ERROR_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ERROR_AW, O>;
+impl<'a, const O: u8> ERROR_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ERROR_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    pub fn endksgen(&self) -> ENDKSGEN_R {
+        ENDKSGEN_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    pub fn endcrypt(&self) -> ENDCRYPT_R {
+        ENDCRYPT_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event ERROR"]
+    #[inline(always)]
+    pub fn error(&self) -> ERROR_R {
+        ERROR_R::new(((self.bits >> 2) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event ENDKSGEN"]
+    #[inline(always)]
+    #[must_use]
+    pub fn endksgen(&mut self) -> ENDKSGEN_W<0> {
+        ENDKSGEN_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event ENDCRYPT"]
+    #[inline(always)]
+    #[must_use]
+    pub fn endcrypt(&mut self) -> ENDCRYPT_W<1> {
+        ENDCRYPT_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event ERROR"]
+    #[inline(always)]
+    #[must_use]
+    pub fn error(&mut self) -> ERROR_W<2> {
+        ERROR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/micstatus.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `MICSTATUS` reader"]
+pub struct R(crate::R<MICSTATUS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MICSTATUS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MICSTATUS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MICSTATUS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `MICSTATUS` reader - The result of the MIC check performed during the previous decryption operation"]
+pub type MICSTATUS_R = crate::BitReader<MICSTATUS_A>;
+#[doc = "The result of the MIC check performed during the previous decryption operation\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum MICSTATUS_A {
+    #[doc = "0: MIC check failed"]
+    CHECK_FAILED = 0,
+    #[doc = "1: MIC check passed"]
+    CHECK_PASSED = 1,
+}
+impl From<MICSTATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: MICSTATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MICSTATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MICSTATUS_A {
+        match self.bits {
+            false => MICSTATUS_A::CHECK_FAILED,
+            true => MICSTATUS_A::CHECK_PASSED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `CHECK_FAILED`"]
+    #[inline(always)]
+    pub fn is_check_failed(&self) -> bool {
+        *self == MICSTATUS_A::CHECK_FAILED
+    }
+    #[doc = "Checks if the value of the field is `CHECK_PASSED`"]
+    #[inline(always)]
+    pub fn is_check_passed(&self) -> bool {
+        *self == MICSTATUS_A::CHECK_PASSED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - The result of the MIC check performed during the previous decryption operation"]
+    #[inline(always)]
+    pub fn micstatus(&self) -> MICSTATUS_R {
+        MICSTATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "MIC check result\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [micstatus](index.html) module"]
+pub struct MICSTATUS_SPEC;
+impl crate::RegisterSpec for MICSTATUS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [micstatus::R](R) reader structure"]
+impl crate::Readable for MICSTATUS_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets MICSTATUS to value 0"]
+impl crate::Resettable for MICSTATUS_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/mode.rs

@@ -0,0 +1,248 @@
+#[doc = "Register `MODE` reader"]
+pub struct R(crate::R<MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MODE` writer"]
+pub struct W(crate::W<MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `MODE` reader - The mode of operation to be used"]
+pub type MODE_R = crate::BitReader<MODE_A>;
+#[doc = "The mode of operation to be used\n\nValue on reset: 1"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum MODE_A {
+    #[doc = "0: AES CCM packet encryption mode"]
+    ENCRYPTION = 0,
+    #[doc = "1: AES CCM packet decryption mode"]
+    DECRYPTION = 1,
+}
+impl From<MODE_A> for bool {
+    #[inline(always)]
+    fn from(variant: MODE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MODE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MODE_A {
+        match self.bits {
+            false => MODE_A::ENCRYPTION,
+            true => MODE_A::DECRYPTION,
+        }
+    }
+    #[doc = "Checks if the value of the field is `ENCRYPTION`"]
+    #[inline(always)]
+    pub fn is_encryption(&self) -> bool {
+        *self == MODE_A::ENCRYPTION
+    }
+    #[doc = "Checks if the value of the field is `DECRYPTION`"]
+    #[inline(always)]
+    pub fn is_decryption(&self) -> bool {
+        *self == MODE_A::DECRYPTION
+    }
+}
+#[doc = "Field `MODE` writer - The mode of operation to be used"]
+pub type MODE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, MODE_A, O>;
+impl<'a, const O: u8> MODE_W<'a, O> {
+    #[doc = "AES CCM packet encryption mode"]
+    #[inline(always)]
+    pub fn encryption(self) -> &'a mut W {
+        self.variant(MODE_A::ENCRYPTION)
+    }
+    #[doc = "AES CCM packet decryption mode"]
+    #[inline(always)]
+    pub fn decryption(self) -> &'a mut W {
+        self.variant(MODE_A::DECRYPTION)
+    }
+}
+#[doc = "Field `DATARATE` reader - Data rate that the CCM shall run in synch with"]
+pub type DATARATE_R = crate::BitReader<DATARATE_A>;
+#[doc = "Data rate that the CCM shall run in synch with\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DATARATE_A {
+    #[doc = "0: In synch with 1 Mbit data rate"]
+    _1MBIT = 0,
+    #[doc = "1: In synch with 2 Mbit data rate"]
+    _2MBIT = 1,
+}
+impl From<DATARATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DATARATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DATARATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DATARATE_A {
+        match self.bits {
+            false => DATARATE_A::_1MBIT,
+            true => DATARATE_A::_2MBIT,
+        }
+    }
+    #[doc = "Checks if the value of the field is `_1MBIT`"]
+    #[inline(always)]
+    pub fn is_1mbit(&self) -> bool {
+        *self == DATARATE_A::_1MBIT
+    }
+    #[doc = "Checks if the value of the field is `_2MBIT`"]
+    #[inline(always)]
+    pub fn is_2mbit(&self) -> bool {
+        *self == DATARATE_A::_2MBIT
+    }
+}
+#[doc = "Field `DATARATE` writer - Data rate that the CCM shall run in synch with"]
+pub type DATARATE_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, DATARATE_A, O>;
+impl<'a, const O: u8> DATARATE_W<'a, O> {
+    #[doc = "In synch with 1 Mbit data rate"]
+    #[inline(always)]
+    pub fn _1mbit(self) -> &'a mut W {
+        self.variant(DATARATE_A::_1MBIT)
+    }
+    #[doc = "In synch with 2 Mbit data rate"]
+    #[inline(always)]
+    pub fn _2mbit(self) -> &'a mut W {
+        self.variant(DATARATE_A::_2MBIT)
+    }
+}
+#[doc = "Field `LENGTH` reader - Packet length configuration"]
+pub type LENGTH_R = crate::BitReader<LENGTH_A>;
+#[doc = "Packet length configuration\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum LENGTH_A {
+    #[doc = "0: Default length. Effective length of LENGTH field is 5-bit"]
+    DEFAULT = 0,
+    #[doc = "1: Extended length. Effective length of LENGTH field is 8-bit"]
+    EXTENDED = 1,
+}
+impl From<LENGTH_A> for bool {
+    #[inline(always)]
+    fn from(variant: LENGTH_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LENGTH_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LENGTH_A {
+        match self.bits {
+            false => LENGTH_A::DEFAULT,
+            true => LENGTH_A::EXTENDED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DEFAULT`"]
+    #[inline(always)]
+    pub fn is_default(&self) -> bool {
+        *self == LENGTH_A::DEFAULT
+    }
+    #[doc = "Checks if the value of the field is `EXTENDED`"]
+    #[inline(always)]
+    pub fn is_extended(&self) -> bool {
+        *self == LENGTH_A::EXTENDED
+    }
+}
+#[doc = "Field `LENGTH` writer - Packet length configuration"]
+pub type LENGTH_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, LENGTH_A, O>;
+impl<'a, const O: u8> LENGTH_W<'a, O> {
+    #[doc = "Default length. Effective length of LENGTH field is 5-bit"]
+    #[inline(always)]
+    pub fn default(self) -> &'a mut W {
+        self.variant(LENGTH_A::DEFAULT)
+    }
+    #[doc = "Extended length. Effective length of LENGTH field is 8-bit"]
+    #[inline(always)]
+    pub fn extended(self) -> &'a mut W {
+        self.variant(LENGTH_A::EXTENDED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - The mode of operation to be used"]
+    #[inline(always)]
+    pub fn mode(&self) -> MODE_R {
+        MODE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 16 - Data rate that the CCM shall run in synch with"]
+    #[inline(always)]
+    pub fn datarate(&self) -> DATARATE_R {
+        DATARATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+    #[doc = "Bit 24 - Packet length configuration"]
+    #[inline(always)]
+    pub fn length(&self) -> LENGTH_R {
+        LENGTH_R::new(((self.bits >> 24) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - The mode of operation to be used"]
+    #[inline(always)]
+    #[must_use]
+    pub fn mode(&mut self) -> MODE_W<0> {
+        MODE_W::new(self)
+    }
+    #[doc = "Bit 16 - Data rate that the CCM shall run in synch with"]
+    #[inline(always)]
+    #[must_use]
+    pub fn datarate(&mut self) -> DATARATE_W<16> {
+        DATARATE_W::new(self)
+    }
+    #[doc = "Bit 24 - Packet length configuration"]
+    #[inline(always)]
+    #[must_use]
+    pub fn length(&mut self) -> LENGTH_W<24> {
+        LENGTH_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Operation mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
+pub struct MODE_SPEC;
+impl crate::RegisterSpec for MODE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mode::R](R) reader structure"]
+impl crate::Readable for MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
+impl crate::Writable for MODE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets MODE to value 0x01"]
+impl crate::Resettable for MODE_SPEC {
+    const RESET_VALUE: Self::Ux = 0x01;
+}

down-the-stack/dk_pac/src/ccm/outptr.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `OUTPTR` reader"]
+pub struct R(crate::R<OUTPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<OUTPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<OUTPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<OUTPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `OUTPTR` writer"]
+pub struct W(crate::W<OUTPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<OUTPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<OUTPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<OUTPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `OUTPTR` reader - Output pointer"]
+pub type OUTPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `OUTPTR` writer - Output pointer"]
+pub type OUTPTR_W<'a, const O: u8> = crate::FieldWriter<'a, u32, OUTPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Output pointer"]
+    #[inline(always)]
+    pub fn outptr(&self) -> OUTPTR_R {
+        OUTPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Output pointer"]
+    #[inline(always)]
+    #[must_use]
+    pub fn outptr(&mut self) -> OUTPTR_W<0> {
+        OUTPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Output pointer\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [outptr](index.html) module"]
+pub struct OUTPTR_SPEC;
+impl crate::RegisterSpec for OUTPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [outptr::R](R) reader structure"]
+impl crate::Readable for OUTPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [outptr::W](W) writer structure"]
+impl crate::Writable for OUTPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets OUTPTR to value 0"]
+impl crate::Resettable for OUTPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/scratchptr.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `SCRATCHPTR` reader"]
+pub struct R(crate::R<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SCRATCHPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SCRATCHPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SCRATCHPTR` writer"]
+pub struct W(crate::W<SCRATCHPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SCRATCHPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SCRATCHPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SCRATCHPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SCRATCHPTR` reader - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
+pub type SCRATCHPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `SCRATCHPTR` writer - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
+pub type SCRATCHPTR_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, SCRATCHPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
+    #[inline(always)]
+    pub fn scratchptr(&self) -> SCRATCHPTR_R {
+        SCRATCHPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to a scratch data area used for temporary storage during key-stream generation, MIC generation and encryption/decryption."]
+    #[inline(always)]
+    #[must_use]
+    pub fn scratchptr(&mut self) -> SCRATCHPTR_W<0> {
+        SCRATCHPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pointer to data area used for temporary storage\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [scratchptr](index.html) module"]
+pub struct SCRATCHPTR_SPEC;
+impl crate::RegisterSpec for SCRATCHPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [scratchptr::R](R) reader structure"]
+impl crate::Readable for SCRATCHPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [scratchptr::W](W) writer structure"]
+impl crate::Writable for SCRATCHPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets SCRATCHPTR to value 0"]
+impl crate::Resettable for SCRATCHPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/shorts.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `SHORTS` reader"]
+pub struct R(crate::R<SHORTS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SHORTS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SHORTS` writer"]
+pub struct W(crate::W<SHORTS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SHORTS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDKSGEN_CRYPT` reader - Shortcut between event ENDKSGEN and task CRYPT"]
+pub type ENDKSGEN_CRYPT_R = crate::BitReader<ENDKSGEN_CRYPT_A>;
+#[doc = "Shortcut between event ENDKSGEN and task CRYPT\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDKSGEN_CRYPT_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<ENDKSGEN_CRYPT_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDKSGEN_CRYPT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDKSGEN_CRYPT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDKSGEN_CRYPT_A {
+        match self.bits {
+            false => ENDKSGEN_CRYPT_A::DISABLED,
+            true => ENDKSGEN_CRYPT_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDKSGEN_CRYPT_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDKSGEN_CRYPT_A::ENABLED
+    }
+}
+#[doc = "Field `ENDKSGEN_CRYPT` writer - Shortcut between event ENDKSGEN and task CRYPT"]
+pub type ENDKSGEN_CRYPT_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, ENDKSGEN_CRYPT_A, O>;
+impl<'a, const O: u8> ENDKSGEN_CRYPT_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENDKSGEN_CRYPT_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENDKSGEN_CRYPT_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Shortcut between event ENDKSGEN and task CRYPT"]
+    #[inline(always)]
+    pub fn endksgen_crypt(&self) -> ENDKSGEN_CRYPT_R {
+        ENDKSGEN_CRYPT_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Shortcut between event ENDKSGEN and task CRYPT"]
+    #[inline(always)]
+    #[must_use]
+    pub fn endksgen_crypt(&mut self) -> ENDKSGEN_CRYPT_W<0> {
+        ENDKSGEN_CRYPT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Shortcuts between local events and tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
+pub struct SHORTS_SPEC;
+impl crate::RegisterSpec for SHORTS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [shorts::R](R) reader structure"]
+impl crate::Readable for SHORTS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
+impl crate::Writable for SHORTS_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets SHORTS to value 0"]
+impl crate::Resettable for SHORTS_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/tasks_crypt.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_CRYPT` writer"]
+pub struct W(crate::W<TASKS_CRYPT_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CRYPT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CRYPT_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CRYPT_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start encryption/decryption. This operation will stop by itself when completed.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_CRYPT_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CRYPT_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CRYPT_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CRYPT` writer - Start encryption/decryption. This operation will stop by itself when completed."]
+pub type TASKS_CRYPT_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_CRYPT_SPEC, TASKS_CRYPT_AW, O>;
+impl<'a, const O: u8> TASKS_CRYPT_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CRYPT_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start encryption/decryption. This operation will stop by itself when completed."]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_crypt(&mut self) -> TASKS_CRYPT_W<0> {
+        TASKS_CRYPT_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start encryption/decryption. This operation will stop by itself when completed.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_crypt](index.html) module"]
+pub struct TASKS_CRYPT_SPEC;
+impl crate::RegisterSpec for TASKS_CRYPT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_crypt::W](W) writer structure"]
+impl crate::Writable for TASKS_CRYPT_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_CRYPT to value 0"]
+impl crate::Resettable for TASKS_CRYPT_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/tasks_ksgen.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_KSGEN` writer"]
+pub struct W(crate::W<TASKS_KSGEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_KSGEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_KSGEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_KSGEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start generation of key-stream. This operation will stop by itself when completed.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_KSGEN_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_KSGEN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_KSGEN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_KSGEN` writer - Start generation of key-stream. This operation will stop by itself when completed."]
+pub type TASKS_KSGEN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_KSGEN_SPEC, TASKS_KSGEN_AW, O>;
+impl<'a, const O: u8> TASKS_KSGEN_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_KSGEN_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start generation of key-stream. This operation will stop by itself when completed."]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_ksgen(&mut self) -> TASKS_KSGEN_W<0> {
+        TASKS_KSGEN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start generation of key-stream. This operation will stop by itself when completed.\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ksgen](index.html) module"]
+pub struct TASKS_KSGEN_SPEC;
+impl crate::RegisterSpec for TASKS_KSGEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_ksgen::W](W) writer structure"]
+impl crate::Writable for TASKS_KSGEN_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_KSGEN to value 0"]
+impl crate::Resettable for TASKS_KSGEN_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ccm/tasks_stop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOP` writer"]
+pub struct W(crate::W<TASKS_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop encryption/decryption\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_STOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOP` writer - Stop encryption/decryption"]
+pub type TASKS_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOP_SPEC, TASKS_STOP_AW, O>;
+impl<'a, const O: u8> TASKS_STOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop encryption/decryption"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
+        TASKS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop encryption/decryption\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
+pub struct TASKS_STOP_SPEC;
+impl crate::RegisterSpec for TASKS_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
+impl crate::Writable for TASKS_STOP_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_STOP to value 0"]
+impl crate::Resettable for TASKS_STOP_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock.rs

@@ -0,0 +1,138 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start HFCLK crystal oscillator"]
+    pub tasks_hfclkstart: TASKS_HFCLKSTART,
+    #[doc = "0x04 - Stop HFCLK crystal oscillator"]
+    pub tasks_hfclkstop: TASKS_HFCLKSTOP,
+    #[doc = "0x08 - Start LFCLK source"]
+    pub tasks_lfclkstart: TASKS_LFCLKSTART,
+    #[doc = "0x0c - Stop LFCLK source"]
+    pub tasks_lfclkstop: TASKS_LFCLKSTOP,
+    #[doc = "0x10 - Start calibration of LFRC oscillator"]
+    pub tasks_cal: TASKS_CAL,
+    #[doc = "0x14 - Start calibration timer"]
+    pub tasks_ctstart: TASKS_CTSTART,
+    #[doc = "0x18 - Stop calibration timer"]
+    pub tasks_ctstop: TASKS_CTSTOP,
+    _reserved7: [u8; 0xe4],
+    #[doc = "0x100 - HFCLK oscillator started"]
+    pub events_hfclkstarted: EVENTS_HFCLKSTARTED,
+    #[doc = "0x104 - LFCLK started"]
+    pub events_lfclkstarted: EVENTS_LFCLKSTARTED,
+    _reserved9: [u8; 0x04],
+    #[doc = "0x10c - Calibration of LFCLK RC oscillator complete event"]
+    pub events_done: EVENTS_DONE,
+    #[doc = "0x110 - Calibration timer timeout"]
+    pub events_ctto: EVENTS_CTTO,
+    _reserved11: [u8; 0x01f0],
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved13: [u8; 0xfc],
+    #[doc = "0x408 - Status indicating that HFCLKSTART task has been triggered"]
+    pub hfclkrun: HFCLKRUN,
+    #[doc = "0x40c - HFCLK status"]
+    pub hfclkstat: HFCLKSTAT,
+    _reserved15: [u8; 0x04],
+    #[doc = "0x414 - Status indicating that LFCLKSTART task has been triggered"]
+    pub lfclkrun: LFCLKRUN,
+    #[doc = "0x418 - LFCLK status"]
+    pub lfclkstat: LFCLKSTAT,
+    #[doc = "0x41c - Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
+    pub lfclksrccopy: LFCLKSRCCOPY,
+    _reserved18: [u8; 0xf8],
+    #[doc = "0x518 - Clock source for the LFCLK"]
+    pub lfclksrc: LFCLKSRC,
+    _reserved19: [u8; 0x1c],
+    #[doc = "0x538 - Calibration timer interval"]
+    pub ctiv: CTIV,
+    _reserved20: [u8; 0x20],
+    #[doc = "0x55c - Clocking options for the Trace Port debug interface"]
+    pub traceconfig: TRACECONFIG,
+}
+#[doc = "TASKS_HFCLKSTART (w) register accessor: an alias for `Reg<TASKS_HFCLKSTART_SPEC>`"]
+pub type TASKS_HFCLKSTART = crate::Reg<tasks_hfclkstart::TASKS_HFCLKSTART_SPEC>;
+#[doc = "Start HFCLK crystal oscillator"]
+pub mod tasks_hfclkstart;
+#[doc = "TASKS_HFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_HFCLKSTOP_SPEC>`"]
+pub type TASKS_HFCLKSTOP = crate::Reg<tasks_hfclkstop::TASKS_HFCLKSTOP_SPEC>;
+#[doc = "Stop HFCLK crystal oscillator"]
+pub mod tasks_hfclkstop;
+#[doc = "TASKS_LFCLKSTART (w) register accessor: an alias for `Reg<TASKS_LFCLKSTART_SPEC>`"]
+pub type TASKS_LFCLKSTART = crate::Reg<tasks_lfclkstart::TASKS_LFCLKSTART_SPEC>;
+#[doc = "Start LFCLK source"]
+pub mod tasks_lfclkstart;
+#[doc = "TASKS_LFCLKSTOP (w) register accessor: an alias for `Reg<TASKS_LFCLKSTOP_SPEC>`"]
+pub type TASKS_LFCLKSTOP = crate::Reg<tasks_lfclkstop::TASKS_LFCLKSTOP_SPEC>;
+#[doc = "Stop LFCLK source"]
+pub mod tasks_lfclkstop;
+#[doc = "TASKS_CAL (w) register accessor: an alias for `Reg<TASKS_CAL_SPEC>`"]
+pub type TASKS_CAL = crate::Reg<tasks_cal::TASKS_CAL_SPEC>;
+#[doc = "Start calibration of LFRC oscillator"]
+pub mod tasks_cal;
+#[doc = "TASKS_CTSTART (w) register accessor: an alias for `Reg<TASKS_CTSTART_SPEC>`"]
+pub type TASKS_CTSTART = crate::Reg<tasks_ctstart::TASKS_CTSTART_SPEC>;
+#[doc = "Start calibration timer"]
+pub mod tasks_ctstart;
+#[doc = "TASKS_CTSTOP (w) register accessor: an alias for `Reg<TASKS_CTSTOP_SPEC>`"]
+pub type TASKS_CTSTOP = crate::Reg<tasks_ctstop::TASKS_CTSTOP_SPEC>;
+#[doc = "Stop calibration timer"]
+pub mod tasks_ctstop;
+#[doc = "EVENTS_HFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_HFCLKSTARTED_SPEC>`"]
+pub type EVENTS_HFCLKSTARTED = crate::Reg<events_hfclkstarted::EVENTS_HFCLKSTARTED_SPEC>;
+#[doc = "HFCLK oscillator started"]
+pub mod events_hfclkstarted;
+#[doc = "EVENTS_LFCLKSTARTED (rw) register accessor: an alias for `Reg<EVENTS_LFCLKSTARTED_SPEC>`"]
+pub type EVENTS_LFCLKSTARTED = crate::Reg<events_lfclkstarted::EVENTS_LFCLKSTARTED_SPEC>;
+#[doc = "LFCLK started"]
+pub mod events_lfclkstarted;
+#[doc = "EVENTS_DONE (rw) register accessor: an alias for `Reg<EVENTS_DONE_SPEC>`"]
+pub type EVENTS_DONE = crate::Reg<events_done::EVENTS_DONE_SPEC>;
+#[doc = "Calibration of LFCLK RC oscillator complete event"]
+pub mod events_done;
+#[doc = "EVENTS_CTTO (rw) register accessor: an alias for `Reg<EVENTS_CTTO_SPEC>`"]
+pub type EVENTS_CTTO = crate::Reg<events_ctto::EVENTS_CTTO_SPEC>;
+#[doc = "Calibration timer timeout"]
+pub mod events_ctto;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "HFCLKRUN (r) register accessor: an alias for `Reg<HFCLKRUN_SPEC>`"]
+pub type HFCLKRUN = crate::Reg<hfclkrun::HFCLKRUN_SPEC>;
+#[doc = "Status indicating that HFCLKSTART task has been triggered"]
+pub mod hfclkrun;
+#[doc = "HFCLKSTAT (r) register accessor: an alias for `Reg<HFCLKSTAT_SPEC>`"]
+pub type HFCLKSTAT = crate::Reg<hfclkstat::HFCLKSTAT_SPEC>;
+#[doc = "HFCLK status"]
+pub mod hfclkstat;
+#[doc = "LFCLKRUN (r) register accessor: an alias for `Reg<LFCLKRUN_SPEC>`"]
+pub type LFCLKRUN = crate::Reg<lfclkrun::LFCLKRUN_SPEC>;
+#[doc = "Status indicating that LFCLKSTART task has been triggered"]
+pub mod lfclkrun;
+#[doc = "LFCLKSTAT (r) register accessor: an alias for `Reg<LFCLKSTAT_SPEC>`"]
+pub type LFCLKSTAT = crate::Reg<lfclkstat::LFCLKSTAT_SPEC>;
+#[doc = "LFCLK status"]
+pub mod lfclkstat;
+#[doc = "LFCLKSRCCOPY (r) register accessor: an alias for `Reg<LFCLKSRCCOPY_SPEC>`"]
+pub type LFCLKSRCCOPY = crate::Reg<lfclksrccopy::LFCLKSRCCOPY_SPEC>;
+#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered"]
+pub mod lfclksrccopy;
+#[doc = "LFCLKSRC (rw) register accessor: an alias for `Reg<LFCLKSRC_SPEC>`"]
+pub type LFCLKSRC = crate::Reg<lfclksrc::LFCLKSRC_SPEC>;
+#[doc = "Clock source for the LFCLK"]
+pub mod lfclksrc;
+#[doc = "CTIV (rw) register accessor: an alias for `Reg<CTIV_SPEC>`"]
+pub type CTIV = crate::Reg<ctiv::CTIV_SPEC>;
+#[doc = "Calibration timer interval"]
+pub mod ctiv;
+#[doc = "TRACECONFIG (rw) register accessor: an alias for `Reg<TRACECONFIG_SPEC>`"]
+pub type TRACECONFIG = crate::Reg<traceconfig::TRACECONFIG_SPEC>;
+#[doc = "Clocking options for the Trace Port debug interface"]
+pub mod traceconfig;

down-the-stack/dk_pac/src/clock/ctiv.rs

@@ -0,0 +1,80 @@
+#[doc = "Register `CTIV` reader"]
+pub struct R(crate::R<CTIV_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<CTIV_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<CTIV_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<CTIV_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `CTIV` writer"]
+pub struct W(crate::W<CTIV_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<CTIV_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<CTIV_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<CTIV_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `CTIV` reader - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
+pub type CTIV_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `CTIV` writer - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
+pub type CTIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTIV_SPEC, u8, u8, 7, O>;
+impl R {
+    #[doc = "Bits 0:6 - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
+    #[inline(always)]
+    pub fn ctiv(&self) -> CTIV_R {
+        CTIV_R::new((self.bits & 0x7f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:6 - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
+    #[inline(always)]
+    #[must_use]
+    pub fn ctiv(&mut self) -> CTIV_W<0> {
+        CTIV_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Calibration timer interval\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiv](index.html) module"]
+pub struct CTIV_SPEC;
+impl crate::RegisterSpec for CTIV_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ctiv::R](R) reader structure"]
+impl crate::Readable for CTIV_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ctiv::W](W) writer structure"]
+impl crate::Writable for CTIV_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets CTIV to value 0"]
+impl crate::Resettable for CTIV_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/events_ctto.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_CTTO` reader"]
+pub struct R(crate::R<EVENTS_CTTO_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_CTTO_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_CTTO_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_CTTO_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_CTTO` writer"]
+pub struct W(crate::W<EVENTS_CTTO_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_CTTO_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_CTTO_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_CTTO_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_CTTO` reader - Calibration timer timeout"]
+pub type EVENTS_CTTO_R = crate::BitReader<EVENTS_CTTO_A>;
+#[doc = "Calibration timer timeout\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_CTTO_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_CTTO_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_CTTO_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_CTTO_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_CTTO_A {
+        match self.bits {
+            false => EVENTS_CTTO_A::NOT_GENERATED,
+            true => EVENTS_CTTO_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_CTTO_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_CTTO_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_CTTO` writer - Calibration timer timeout"]
+pub type EVENTS_CTTO_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_CTTO_SPEC, EVENTS_CTTO_A, O>;
+impl<'a, const O: u8> EVENTS_CTTO_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_CTTO_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_CTTO_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Calibration timer timeout"]
+    #[inline(always)]
+    pub fn events_ctto(&self) -> EVENTS_CTTO_R {
+        EVENTS_CTTO_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Calibration timer timeout"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_ctto(&mut self) -> EVENTS_CTTO_W<0> {
+        EVENTS_CTTO_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Calibration timer timeout\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ctto](index.html) module"]
+pub struct EVENTS_CTTO_SPEC;
+impl crate::RegisterSpec for EVENTS_CTTO_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_ctto::R](R) reader structure"]
+impl crate::Readable for EVENTS_CTTO_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_ctto::W](W) writer structure"]
+impl crate::Writable for EVENTS_CTTO_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_CTTO to value 0"]
+impl crate::Resettable for EVENTS_CTTO_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/events_done.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_DONE` reader"]
+pub struct R(crate::R<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_DONE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_DONE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_DONE` writer"]
+pub struct W(crate::W<EVENTS_DONE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_DONE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_DONE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_DONE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_DONE` reader - Calibration of LFCLK RC oscillator complete event"]
+pub type EVENTS_DONE_R = crate::BitReader<EVENTS_DONE_A>;
+#[doc = "Calibration of LFCLK RC oscillator complete event\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_DONE_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_DONE_A {
+        match self.bits {
+            false => EVENTS_DONE_A::NOT_GENERATED,
+            true => EVENTS_DONE_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_DONE_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_DONE` writer - Calibration of LFCLK RC oscillator complete event"]
+pub type EVENTS_DONE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_DONE_SPEC, EVENTS_DONE_A, O>;
+impl<'a, const O: u8> EVENTS_DONE_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_DONE_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Calibration of LFCLK RC oscillator complete event"]
+    #[inline(always)]
+    pub fn events_done(&self) -> EVENTS_DONE_R {
+        EVENTS_DONE_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Calibration of LFCLK RC oscillator complete event"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_done(&mut self) -> EVENTS_DONE_W<0> {
+        EVENTS_DONE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Calibration of LFCLK RC oscillator complete event\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_done](index.html) module"]
+pub struct EVENTS_DONE_SPEC;
+impl crate::RegisterSpec for EVENTS_DONE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_done::R](R) reader structure"]
+impl crate::Readable for EVENTS_DONE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_done::W](W) writer structure"]
+impl crate::Writable for EVENTS_DONE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_DONE to value 0"]
+impl crate::Resettable for EVENTS_DONE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/events_hfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_HFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_HFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_HFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_HFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_HFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_HFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_HFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` reader - HFCLK oscillator started"]
+pub type EVENTS_HFCLKSTARTED_R = crate::BitReader<EVENTS_HFCLKSTARTED_A>;
+#[doc = "HFCLK oscillator started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_HFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_HFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_HFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_HFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_HFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_HFCLKSTARTED` writer - HFCLK oscillator started"]
+pub type EVENTS_HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_HFCLKSTARTED_SPEC, EVENTS_HFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_HFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_HFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLK oscillator started"]
+    #[inline(always)]
+    pub fn events_hfclkstarted(&self) -> EVENTS_HFCLKSTARTED_R {
+        EVENTS_HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - HFCLK oscillator started"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_hfclkstarted(&mut self) -> EVENTS_HFCLKSTARTED_W<0> {
+        EVENTS_HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "HFCLK oscillator started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_hfclkstarted](index.html) module"]
+pub struct EVENTS_HFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_HFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_hfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_HFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_hfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_HFCLKSTARTED_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_HFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_HFCLKSTARTED_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/events_lfclkstarted.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_LFCLKSTARTED` reader"]
+pub struct R(crate::R<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_LFCLKSTARTED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_LFCLKSTARTED` writer"]
+pub struct W(crate::W<EVENTS_LFCLKSTARTED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_LFCLKSTARTED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_LFCLKSTARTED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_LFCLKSTARTED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` reader - LFCLK started"]
+pub type EVENTS_LFCLKSTARTED_R = crate::BitReader<EVENTS_LFCLKSTARTED_A>;
+#[doc = "LFCLK started\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_LFCLKSTARTED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_LFCLKSTARTED_A {
+        match self.bits {
+            false => EVENTS_LFCLKSTARTED_A::NOT_GENERATED,
+            true => EVENTS_LFCLKSTARTED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_LFCLKSTARTED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_LFCLKSTARTED` writer - LFCLK started"]
+pub type EVENTS_LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_LFCLKSTARTED_SPEC, EVENTS_LFCLKSTARTED_A, O>;
+impl<'a, const O: u8> EVENTS_LFCLKSTARTED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_LFCLKSTARTED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLK started"]
+    #[inline(always)]
+    pub fn events_lfclkstarted(&self) -> EVENTS_LFCLKSTARTED_R {
+        EVENTS_LFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - LFCLK started"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_lfclkstarted(&mut self) -> EVENTS_LFCLKSTARTED_W<0> {
+        EVENTS_LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "LFCLK started\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_lfclkstarted](index.html) module"]
+pub struct EVENTS_LFCLKSTARTED_SPEC;
+impl crate::RegisterSpec for EVENTS_LFCLKSTARTED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_lfclkstarted::R](R) reader structure"]
+impl crate::Readable for EVENTS_LFCLKSTARTED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_lfclkstarted::W](W) writer structure"]
+impl crate::Writable for EVENTS_LFCLKSTARTED_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_LFCLKSTARTED to value 0"]
+impl crate::Resettable for EVENTS_LFCLKSTARTED_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/hfclkrun.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `HFCLKRUN` reader"]
+pub struct R(crate::R<HFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - HFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "HFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - HFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that HFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkrun](index.html) module"]
+pub struct HFCLKRUN_SPEC;
+impl crate::RegisterSpec for HFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkrun::R](R) reader structure"]
+impl crate::Readable for HFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKRUN to value 0"]
+impl crate::Resettable for HFCLKRUN_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/hfclkstat.rs

@@ -0,0 +1,112 @@
+#[doc = "Register `HFCLKSTAT` reader"]
+pub struct R(crate::R<HFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Source of HFCLK"]
+pub type SRC_R = crate::BitReader<SRC_A>;
+#[doc = "Source of HFCLK\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum SRC_A {
+    #[doc = "0: 64 MHz internal oscillator (HFINT)"]
+    RC = 0,
+    #[doc = "1: 64 MHz crystal oscillator (HFXO)"]
+    XTAL = 1,
+}
+impl From<SRC_A> for bool {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> SRC_A {
+        match self.bits {
+            false => SRC_A::RC,
+            true => SRC_A::XTAL,
+        }
+    }
+    #[doc = "Checks if the value of the field is `RC`"]
+    #[inline(always)]
+    pub fn is_rc(&self) -> bool {
+        *self == SRC_A::RC
+    }
+    #[doc = "Checks if the value of the field is `XTAL`"]
+    #[inline(always)]
+    pub fn is_xtal(&self) -> bool {
+        *self == SRC_A::XTAL
+    }
+}
+#[doc = "Field `STATE` reader - HFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "HFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum STATE_A {
+    #[doc = "0: HFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: HFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Source of HFCLK"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 16 - HFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "HFCLK status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hfclkstat](index.html) module"]
+pub struct HFCLKSTAT_SPEC;
+impl crate::RegisterSpec for HFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hfclkstat::R](R) reader structure"]
+impl crate::Readable for HFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets HFCLKSTAT to value 0"]
+impl crate::Resettable for HFCLKSTAT_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/intenclr.rs

@@ -0,0 +1,339 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to disable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to disable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENCLR_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::CLEAR)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to disable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DONE_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to disable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(DONE_AW::CLEAR)
+    }
+}
+#[doc = "Field `CTTO` reader - Write '1' to disable interrupt for event CTTO"]
+pub type CTTO_R = crate::BitReader<CTTO_A>;
+#[doc = "Write '1' to disable interrupt for event CTTO\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CTTO_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<CTTO_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTTO_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTTO_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTTO_A {
+        match self.bits {
+            false => CTTO_A::DISABLED,
+            true => CTTO_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CTTO_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CTTO_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event CTTO\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CTTO_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<CTTO_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CTTO_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CTTO` writer - Write '1' to disable interrupt for event CTTO"]
+pub type CTTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CTTO_AW, O>;
+impl<'a, const O: u8> CTTO_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(CTTO_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Write '1' to disable interrupt for event CTTO"]
+    #[inline(always)]
+    pub fn ctto(&self) -> CTTO_R {
+        CTTO_R::new(((self.bits >> 4) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event DONE"]
+    #[inline(always)]
+    #[must_use]
+    pub fn done(&mut self) -> DONE_W<3> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 4 - Write '1' to disable interrupt for event CTTO"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ctto(&mut self) -> CTTO_W<4> {
+        CTTO_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/intenset.rs

@@ -0,0 +1,339 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HFCLKSTARTED` reader - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_R = crate::BitReader<HFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum HFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<HFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HFCLKSTARTED_A {
+        match self.bits {
+            false => HFCLKSTARTED_A::DISABLED,
+            true => HFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == HFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event HFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum HFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<HFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: HFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `HFCLKSTARTED` writer - Write '1' to enable interrupt for event HFCLKSTARTED"]
+pub type HFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, HFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> HFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(HFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `LFCLKSTARTED` reader - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_R = crate::BitReader<LFCLKSTARTED_A>;
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum LFCLKSTARTED_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<LFCLKSTARTED_A> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl LFCLKSTARTED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> LFCLKSTARTED_A {
+        match self.bits {
+            false => LFCLKSTARTED_A::DISABLED,
+            true => LFCLKSTARTED_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == LFCLKSTARTED_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event LFCLKSTARTED\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum LFCLKSTARTED_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<LFCLKSTARTED_AW> for bool {
+    #[inline(always)]
+    fn from(variant: LFCLKSTARTED_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `LFCLKSTARTED` writer - Write '1' to enable interrupt for event LFCLKSTARTED"]
+pub type LFCLKSTARTED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, INTENSET_SPEC, LFCLKSTARTED_AW, O>;
+impl<'a, const O: u8> LFCLKSTARTED_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(LFCLKSTARTED_AW::SET)
+    }
+}
+#[doc = "Field `DONE` reader - Write '1' to enable interrupt for event DONE"]
+pub type DONE_R = crate::BitReader<DONE_A>;
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DONE_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DONE_A> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DONE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DONE_A {
+        match self.bits {
+            false => DONE_A::DISABLED,
+            true => DONE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DONE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DONE_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event DONE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DONE_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<DONE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DONE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DONE` writer - Write '1' to enable interrupt for event DONE"]
+pub type DONE_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DONE_AW, O>;
+impl<'a, const O: u8> DONE_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(DONE_AW::SET)
+    }
+}
+#[doc = "Field `CTTO` reader - Write '1' to enable interrupt for event CTTO"]
+pub type CTTO_R = crate::BitReader<CTTO_A>;
+#[doc = "Write '1' to enable interrupt for event CTTO\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CTTO_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<CTTO_A> for bool {
+    #[inline(always)]
+    fn from(variant: CTTO_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CTTO_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CTTO_A {
+        match self.bits {
+            false => CTTO_A::DISABLED,
+            true => CTTO_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CTTO_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CTTO_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event CTTO\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CTTO_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<CTTO_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CTTO_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CTTO` writer - Write '1' to enable interrupt for event CTTO"]
+pub type CTTO_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CTTO_AW, O>;
+impl<'a, const O: u8> CTTO_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(CTTO_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    pub fn hfclkstarted(&self) -> HFCLKSTARTED_R {
+        HFCLKSTARTED_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    pub fn lfclkstarted(&self) -> LFCLKSTARTED_R {
+        LFCLKSTARTED_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    pub fn done(&self) -> DONE_R {
+        DONE_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Write '1' to enable interrupt for event CTTO"]
+    #[inline(always)]
+    pub fn ctto(&self) -> CTTO_R {
+        CTTO_R::new(((self.bits >> 4) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event HFCLKSTARTED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn hfclkstarted(&mut self) -> HFCLKSTARTED_W<0> {
+        HFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event LFCLKSTARTED"]
+    #[inline(always)]
+    #[must_use]
+    pub fn lfclkstarted(&mut self) -> LFCLKSTARTED_W<1> {
+        LFCLKSTARTED_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event DONE"]
+    #[inline(always)]
+    #[must_use]
+    pub fn done(&mut self) -> DONE_W<3> {
+        DONE_W::new(self)
+    }
+    #[doc = "Bit 4 - Write '1' to enable interrupt for event CTTO"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ctto(&mut self) -> CTTO_W<4> {
+        CTTO_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/lfclkrun.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `LFCLKRUN` reader"]
+pub struct R(crate::R<LFCLKRUN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKRUN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKRUN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKRUN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `STATUS` reader - LFCLKSTART task triggered or not"]
+pub type STATUS_R = crate::BitReader<STATUS_A>;
+#[doc = "LFCLKSTART task triggered or not\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum STATUS_A {
+    #[doc = "0: Task not triggered"]
+    NOT_TRIGGERED = 0,
+    #[doc = "1: Task triggered"]
+    TRIGGERED = 1,
+}
+impl From<STATUS_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATUS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATUS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATUS_A {
+        match self.bits {
+            false => STATUS_A::NOT_TRIGGERED,
+            true => STATUS_A::TRIGGERED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_not_triggered(&self) -> bool {
+        *self == STATUS_A::NOT_TRIGGERED
+    }
+    #[doc = "Checks if the value of the field is `TRIGGERED`"]
+    #[inline(always)]
+    pub fn is_triggered(&self) -> bool {
+        *self == STATUS_A::TRIGGERED
+    }
+}
+impl R {
+    #[doc = "Bit 0 - LFCLKSTART task triggered or not"]
+    #[inline(always)]
+    pub fn status(&self) -> STATUS_R {
+        STATUS_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Status indicating that LFCLKSTART task has been triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkrun](index.html) module"]
+pub struct LFCLKRUN_SPEC;
+impl crate::RegisterSpec for LFCLKRUN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkrun::R](R) reader structure"]
+impl crate::Readable for LFCLKRUN_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKRUN to value 0"]
+impl crate::Resettable for LFCLKRUN_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/lfclksrc.rs

@@ -0,0 +1,263 @@
+#[doc = "Register `LFCLKSRC` reader"]
+pub struct R(crate::R<LFCLKSRC_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRC_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRC_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `LFCLKSRC` writer"]
+pub struct W(crate::W<LFCLKSRC_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<LFCLKSRC_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<LFCLKSRC_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<LFCLKSRC_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SRC` reader - Clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "0: 32.768 kHz RC oscillator"]
+    RC = 0,
+    #[doc = "1: 32.768 kHz crystal oscillator"]
+    XTAL = 1,
+    #[doc = "2: 32.768 kHz synthesized from HFCLK"]
+    SYNTH = 2,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            0 => Some(SRC_A::RC),
+            1 => Some(SRC_A::XTAL),
+            2 => Some(SRC_A::SYNTH),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `RC`"]
+    #[inline(always)]
+    pub fn is_rc(&self) -> bool {
+        *self == SRC_A::RC
+    }
+    #[doc = "Checks if the value of the field is `XTAL`"]
+    #[inline(always)]
+    pub fn is_xtal(&self) -> bool {
+        *self == SRC_A::XTAL
+    }
+    #[doc = "Checks if the value of the field is `SYNTH`"]
+    #[inline(always)]
+    pub fn is_synth(&self) -> bool {
+        *self == SRC_A::SYNTH
+    }
+}
+#[doc = "Field `SRC` writer - Clock source"]
+pub type SRC_W<'a, const O: u8> = crate::FieldWriter<'a, u32, LFCLKSRC_SPEC, u8, SRC_A, 2, O>;
+impl<'a, const O: u8> SRC_W<'a, O> {
+    #[doc = "32.768 kHz RC oscillator"]
+    #[inline(always)]
+    pub fn rc(self) -> &'a mut W {
+        self.variant(SRC_A::RC)
+    }
+    #[doc = "32.768 kHz crystal oscillator"]
+    #[inline(always)]
+    pub fn xtal(self) -> &'a mut W {
+        self.variant(SRC_A::XTAL)
+    }
+    #[doc = "32.768 kHz synthesized from HFCLK"]
+    #[inline(always)]
+    pub fn synth(self) -> &'a mut W {
+        self.variant(SRC_A::SYNTH)
+    }
+}
+#[doc = "Field `BYPASS` reader - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
+pub type BYPASS_R = crate::BitReader<BYPASS_A>;
+#[doc = "Enable or disable bypass of LFCLK crystal oscillator with external clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum BYPASS_A {
+    #[doc = "0: Disable (use with Xtal or low-swing external source)"]
+    DISABLED = 0,
+    #[doc = "1: Enable (use with rail-to-rail external source)"]
+    ENABLED = 1,
+}
+impl From<BYPASS_A> for bool {
+    #[inline(always)]
+    fn from(variant: BYPASS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl BYPASS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> BYPASS_A {
+        match self.bits {
+            false => BYPASS_A::DISABLED,
+            true => BYPASS_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == BYPASS_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == BYPASS_A::ENABLED
+    }
+}
+#[doc = "Field `BYPASS` writer - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
+pub type BYPASS_W<'a, const O: u8> = crate::BitWriter<'a, u32, LFCLKSRC_SPEC, BYPASS_A, O>;
+impl<'a, const O: u8> BYPASS_W<'a, O> {
+    #[doc = "Disable (use with Xtal or low-swing external source)"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(BYPASS_A::DISABLED)
+    }
+    #[doc = "Enable (use with rail-to-rail external source)"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(BYPASS_A::ENABLED)
+    }
+}
+#[doc = "Field `EXTERNAL` reader - Enable or disable external source for LFCLK"]
+pub type EXTERNAL_R = crate::BitReader<EXTERNAL_A>;
+#[doc = "Enable or disable external source for LFCLK\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EXTERNAL_A {
+    #[doc = "0: Disable external source (use with Xtal)"]
+    DISABLED = 0,
+    #[doc = "1: Enable use of external source instead of Xtal (SRC needs to be set to Xtal)"]
+    ENABLED = 1,
+}
+impl From<EXTERNAL_A> for bool {
+    #[inline(always)]
+    fn from(variant: EXTERNAL_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EXTERNAL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EXTERNAL_A {
+        match self.bits {
+            false => EXTERNAL_A::DISABLED,
+            true => EXTERNAL_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == EXTERNAL_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == EXTERNAL_A::ENABLED
+    }
+}
+#[doc = "Field `EXTERNAL` writer - Enable or disable external source for LFCLK"]
+pub type EXTERNAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, LFCLKSRC_SPEC, EXTERNAL_A, O>;
+impl<'a, const O: u8> EXTERNAL_W<'a, O> {
+    #[doc = "Disable external source (use with Xtal)"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(EXTERNAL_A::DISABLED)
+    }
+    #[doc = "Enable use of external source instead of Xtal (SRC needs to be set to Xtal)"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(EXTERNAL_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 16 - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
+    #[inline(always)]
+    pub fn bypass(&self) -> BYPASS_R {
+        BYPASS_R::new(((self.bits >> 16) & 1) != 0)
+    }
+    #[doc = "Bit 17 - Enable or disable external source for LFCLK"]
+    #[inline(always)]
+    pub fn external(&self) -> EXTERNAL_R {
+        EXTERNAL_R::new(((self.bits >> 17) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Clock source"]
+    #[inline(always)]
+    #[must_use]
+    pub fn src(&mut self) -> SRC_W<0> {
+        SRC_W::new(self)
+    }
+    #[doc = "Bit 16 - Enable or disable bypass of LFCLK crystal oscillator with external clock source"]
+    #[inline(always)]
+    #[must_use]
+    pub fn bypass(&mut self) -> BYPASS_W<16> {
+        BYPASS_W::new(self)
+    }
+    #[doc = "Bit 17 - Enable or disable external source for LFCLK"]
+    #[inline(always)]
+    #[must_use]
+    pub fn external(&mut self) -> EXTERNAL_W<17> {
+        EXTERNAL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clock source for the LFCLK\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrc](index.html) module"]
+pub struct LFCLKSRC_SPEC;
+impl crate::RegisterSpec for LFCLKSRC_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrc::R](R) reader structure"]
+impl crate::Readable for LFCLKSRC_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [lfclksrc::W](W) writer structure"]
+impl crate::Writable for LFCLKSRC_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets LFCLKSRC to value 0"]
+impl crate::Resettable for LFCLKSRC_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/lfclksrccopy.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `LFCLKSRCCOPY` reader"]
+pub struct R(crate::R<LFCLKSRCCOPY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSRCCOPY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSRCCOPY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSRCCOPY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Clock source"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Clock source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "0: 32.768 kHz RC oscillator"]
+    RC = 0,
+    #[doc = "1: 32.768 kHz crystal oscillator"]
+    XTAL = 1,
+    #[doc = "2: 32.768 kHz synthesized from HFCLK"]
+    SYNTH = 2,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            0 => Some(SRC_A::RC),
+            1 => Some(SRC_A::XTAL),
+            2 => Some(SRC_A::SYNTH),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `RC`"]
+    #[inline(always)]
+    pub fn is_rc(&self) -> bool {
+        *self == SRC_A::RC
+    }
+    #[doc = "Checks if the value of the field is `XTAL`"]
+    #[inline(always)]
+    pub fn is_xtal(&self) -> bool {
+        *self == SRC_A::XTAL
+    }
+    #[doc = "Checks if the value of the field is `SYNTH`"]
+    #[inline(always)]
+    pub fn is_synth(&self) -> bool {
+        *self == SRC_A::SYNTH
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Clock source"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+}
+#[doc = "Copy of LFCLKSRC register, set when LFCLKSTART task was triggered\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclksrccopy](index.html) module"]
+pub struct LFCLKSRCCOPY_SPEC;
+impl crate::RegisterSpec for LFCLKSRCCOPY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclksrccopy::R](R) reader structure"]
+impl crate::Readable for LFCLKSRCCOPY_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSRCCOPY to value 0"]
+impl crate::Resettable for LFCLKSRCCOPY_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/lfclkstat.rs

@@ -0,0 +1,122 @@
+#[doc = "Register `LFCLKSTAT` reader"]
+pub struct R(crate::R<LFCLKSTAT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<LFCLKSTAT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<LFCLKSTAT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<LFCLKSTAT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `SRC` reader - Source of LFCLK"]
+pub type SRC_R = crate::FieldReader<u8, SRC_A>;
+#[doc = "Source of LFCLK\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum SRC_A {
+    #[doc = "0: 32.768 kHz RC oscillator"]
+    RC = 0,
+    #[doc = "1: 32.768 kHz crystal oscillator"]
+    XTAL = 1,
+    #[doc = "2: 32.768 kHz synthesized from HFCLK"]
+    SYNTH = 2,
+}
+impl From<SRC_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SRC_A) -> Self {
+        variant as _
+    }
+}
+impl SRC_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SRC_A> {
+        match self.bits {
+            0 => Some(SRC_A::RC),
+            1 => Some(SRC_A::XTAL),
+            2 => Some(SRC_A::SYNTH),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `RC`"]
+    #[inline(always)]
+    pub fn is_rc(&self) -> bool {
+        *self == SRC_A::RC
+    }
+    #[doc = "Checks if the value of the field is `XTAL`"]
+    #[inline(always)]
+    pub fn is_xtal(&self) -> bool {
+        *self == SRC_A::XTAL
+    }
+    #[doc = "Checks if the value of the field is `SYNTH`"]
+    #[inline(always)]
+    pub fn is_synth(&self) -> bool {
+        *self == SRC_A::SYNTH
+    }
+}
+#[doc = "Field `STATE` reader - LFCLK state"]
+pub type STATE_R = crate::BitReader<STATE_A>;
+#[doc = "LFCLK state\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum STATE_A {
+    #[doc = "0: LFCLK not running"]
+    NOT_RUNNING = 0,
+    #[doc = "1: LFCLK running"]
+    RUNNING = 1,
+}
+impl From<STATE_A> for bool {
+    #[inline(always)]
+    fn from(variant: STATE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl STATE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> STATE_A {
+        match self.bits {
+            false => STATE_A::NOT_RUNNING,
+            true => STATE_A::RUNNING,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_RUNNING`"]
+    #[inline(always)]
+    pub fn is_not_running(&self) -> bool {
+        *self == STATE_A::NOT_RUNNING
+    }
+    #[doc = "Checks if the value of the field is `RUNNING`"]
+    #[inline(always)]
+    pub fn is_running(&self) -> bool {
+        *self == STATE_A::RUNNING
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Source of LFCLK"]
+    #[inline(always)]
+    pub fn src(&self) -> SRC_R {
+        SRC_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 16 - LFCLK state"]
+    #[inline(always)]
+    pub fn state(&self) -> STATE_R {
+        STATE_R::new(((self.bits >> 16) & 1) != 0)
+    }
+}
+#[doc = "LFCLK status\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [lfclkstat](index.html) module"]
+pub struct LFCLKSTAT_SPEC;
+impl crate::RegisterSpec for LFCLKSTAT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [lfclkstat::R](R) reader structure"]
+impl crate::Readable for LFCLKSTAT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets LFCLKSTAT to value 0"]
+impl crate::Resettable for LFCLKSTAT_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/tasks_cal.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `TASKS_CAL` writer"]
+pub struct W(crate::W<TASKS_CAL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CAL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CAL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CAL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_CAL_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CAL_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CAL_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CAL` writer - Start calibration of LFRC oscillator"]
+pub type TASKS_CAL_W<'a, const O: u8> = crate::BitWriter<'a, u32, TASKS_CAL_SPEC, TASKS_CAL_AW, O>;
+impl<'a, const O: u8> TASKS_CAL_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CAL_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start calibration of LFRC oscillator"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_cal(&mut self) -> TASKS_CAL_W<0> {
+        TASKS_CAL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start calibration of LFRC oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_cal](index.html) module"]
+pub struct TASKS_CAL_SPEC;
+impl crate::RegisterSpec for TASKS_CAL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_cal::W](W) writer structure"]
+impl crate::Writable for TASKS_CAL_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_CAL to value 0"]
+impl crate::Resettable for TASKS_CAL_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/tasks_ctstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_CTSTART` writer"]
+pub struct W(crate::W<TASKS_CTSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CTSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CTSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CTSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start calibration timer\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_CTSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CTSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CTSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CTSTART` writer - Start calibration timer"]
+pub type TASKS_CTSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_CTSTART_SPEC, TASKS_CTSTART_AW, O>;
+impl<'a, const O: u8> TASKS_CTSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CTSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start calibration timer"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_ctstart(&mut self) -> TASKS_CTSTART_W<0> {
+        TASKS_CTSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start calibration timer\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ctstart](index.html) module"]
+pub struct TASKS_CTSTART_SPEC;
+impl crate::RegisterSpec for TASKS_CTSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_ctstart::W](W) writer structure"]
+impl crate::Writable for TASKS_CTSTART_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_CTSTART to value 0"]
+impl crate::Resettable for TASKS_CTSTART_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/tasks_ctstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_CTSTOP` writer"]
+pub struct W(crate::W<TASKS_CTSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_CTSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_CTSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_CTSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop calibration timer\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_CTSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_CTSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_CTSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_CTSTOP` writer - Stop calibration timer"]
+pub type TASKS_CTSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_CTSTOP_SPEC, TASKS_CTSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_CTSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_CTSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop calibration timer"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_ctstop(&mut self) -> TASKS_CTSTOP_W<0> {
+        TASKS_CTSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop calibration timer\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_ctstop](index.html) module"]
+pub struct TASKS_CTSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_CTSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_ctstop::W](W) writer structure"]
+impl crate::Writable for TASKS_CTSTOP_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_CTSTOP to value 0"]
+impl crate::Resettable for TASKS_CTSTOP_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/tasks_hfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start HFCLK crystal oscillator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_HFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTART` writer - Start HFCLK crystal oscillator"]
+pub type TASKS_HFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTART_SPEC, TASKS_HFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start HFCLK crystal oscillator"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_hfclkstart(&mut self) -> TASKS_HFCLKSTART_W<0> {
+        TASKS_HFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start HFCLK crystal oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstart](index.html) module"]
+pub struct TASKS_HFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTART_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTART_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/tasks_hfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_HFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_HFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_HFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_HFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_HFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop HFCLK crystal oscillator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_HFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_HFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_HFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_HFCLKSTOP` writer - Stop HFCLK crystal oscillator"]
+pub type TASKS_HFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_HFCLKSTOP_SPEC, TASKS_HFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_HFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_HFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop HFCLK crystal oscillator"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_hfclkstop(&mut self) -> TASKS_HFCLKSTOP_W<0> {
+        TASKS_HFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop HFCLK crystal oscillator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_hfclkstop](index.html) module"]
+pub struct TASKS_HFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_HFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_hfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_HFCLKSTOP_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_HFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_HFCLKSTOP_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/tasks_lfclkstart.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTART` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTART_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTART_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTART_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTART_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start LFCLK source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_LFCLKSTART_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTART_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTART_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTART` writer - Start LFCLK source"]
+pub type TASKS_LFCLKSTART_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTART_SPEC, TASKS_LFCLKSTART_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTART_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTART_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start LFCLK source"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_lfclkstart(&mut self) -> TASKS_LFCLKSTART_W<0> {
+        TASKS_LFCLKSTART_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start LFCLK source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstart](index.html) module"]
+pub struct TASKS_LFCLKSTART_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTART_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstart::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTART_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTART to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTART_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/tasks_lfclkstop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_LFCLKSTOP` writer"]
+pub struct W(crate::W<TASKS_LFCLKSTOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_LFCLKSTOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_LFCLKSTOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_LFCLKSTOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop LFCLK source\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_LFCLKSTOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_LFCLKSTOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_LFCLKSTOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_LFCLKSTOP` writer - Stop LFCLK source"]
+pub type TASKS_LFCLKSTOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_LFCLKSTOP_SPEC, TASKS_LFCLKSTOP_AW, O>;
+impl<'a, const O: u8> TASKS_LFCLKSTOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_LFCLKSTOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop LFCLK source"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_lfclkstop(&mut self) -> TASKS_LFCLKSTOP_W<0> {
+        TASKS_LFCLKSTOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop LFCLK source\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_lfclkstop](index.html) module"]
+pub struct TASKS_LFCLKSTOP_SPEC;
+impl crate::RegisterSpec for TASKS_LFCLKSTOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_lfclkstop::W](W) writer structure"]
+impl crate::Writable for TASKS_LFCLKSTOP_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_LFCLKSTOP to value 0"]
+impl crate::Resettable for TASKS_LFCLKSTOP_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/clock/traceconfig.rs

@@ -0,0 +1,232 @@
+#[doc = "Register `TRACECONFIG` reader"]
+pub struct R(crate::R<TRACECONFIG_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<TRACECONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<TRACECONFIG_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<TRACECONFIG_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `TRACECONFIG` writer"]
+pub struct W(crate::W<TRACECONFIG_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TRACECONFIG_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TRACECONFIG_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TRACECONFIG_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `TRACEPORTSPEED` reader - Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two."]
+pub type TRACEPORTSPEED_R = crate::FieldReader<u8, TRACEPORTSPEED_A>;
+#[doc = "Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum TRACEPORTSPEED_A {
+    #[doc = "0: 32 MHz Trace Port clock (TRACECLK = 16 MHz)"]
+    _32MHZ = 0,
+    #[doc = "1: 16 MHz Trace Port clock (TRACECLK = 8 MHz)"]
+    _16MHZ = 1,
+    #[doc = "2: 8 MHz Trace Port clock (TRACECLK = 4 MHz)"]
+    _8MHZ = 2,
+    #[doc = "3: 4 MHz Trace Port clock (TRACECLK = 2 MHz)"]
+    _4MHZ = 3,
+}
+impl From<TRACEPORTSPEED_A> for u8 {
+    #[inline(always)]
+    fn from(variant: TRACEPORTSPEED_A) -> Self {
+        variant as _
+    }
+}
+impl TRACEPORTSPEED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> TRACEPORTSPEED_A {
+        match self.bits {
+            0 => TRACEPORTSPEED_A::_32MHZ,
+            1 => TRACEPORTSPEED_A::_16MHZ,
+            2 => TRACEPORTSPEED_A::_8MHZ,
+            3 => TRACEPORTSPEED_A::_4MHZ,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `_32MHZ`"]
+    #[inline(always)]
+    pub fn is_32mhz(&self) -> bool {
+        *self == TRACEPORTSPEED_A::_32MHZ
+    }
+    #[doc = "Checks if the value of the field is `_16MHZ`"]
+    #[inline(always)]
+    pub fn is_16mhz(&self) -> bool {
+        *self == TRACEPORTSPEED_A::_16MHZ
+    }
+    #[doc = "Checks if the value of the field is `_8MHZ`"]
+    #[inline(always)]
+    pub fn is_8mhz(&self) -> bool {
+        *self == TRACEPORTSPEED_A::_8MHZ
+    }
+    #[doc = "Checks if the value of the field is `_4MHZ`"]
+    #[inline(always)]
+    pub fn is_4mhz(&self) -> bool {
+        *self == TRACEPORTSPEED_A::_4MHZ
+    }
+}
+#[doc = "Field `TRACEPORTSPEED` writer - Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two."]
+pub type TRACEPORTSPEED_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, TRACECONFIG_SPEC, u8, TRACEPORTSPEED_A, 2, O>;
+impl<'a, const O: u8> TRACEPORTSPEED_W<'a, O> {
+    #[doc = "32 MHz Trace Port clock (TRACECLK = 16 MHz)"]
+    #[inline(always)]
+    pub fn _32mhz(self) -> &'a mut W {
+        self.variant(TRACEPORTSPEED_A::_32MHZ)
+    }
+    #[doc = "16 MHz Trace Port clock (TRACECLK = 8 MHz)"]
+    #[inline(always)]
+    pub fn _16mhz(self) -> &'a mut W {
+        self.variant(TRACEPORTSPEED_A::_16MHZ)
+    }
+    #[doc = "8 MHz Trace Port clock (TRACECLK = 4 MHz)"]
+    #[inline(always)]
+    pub fn _8mhz(self) -> &'a mut W {
+        self.variant(TRACEPORTSPEED_A::_8MHZ)
+    }
+    #[doc = "4 MHz Trace Port clock (TRACECLK = 2 MHz)"]
+    #[inline(always)]
+    pub fn _4mhz(self) -> &'a mut W {
+        self.variant(TRACEPORTSPEED_A::_4MHZ)
+    }
+}
+#[doc = "Field `TRACEMUX` reader - Pin multiplexing of trace signals."]
+pub type TRACEMUX_R = crate::FieldReader<u8, TRACEMUX_A>;
+#[doc = "Pin multiplexing of trace signals.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum TRACEMUX_A {
+    #[doc = "0: GPIOs multiplexed onto all trace-pins"]
+    GPIO = 0,
+    #[doc = "1: SWO multiplexed onto P0.18, GPIO multiplexed onto other trace pins"]
+    SERIAL = 1,
+    #[doc = "2: TRACECLK and TRACEDATA multiplexed onto P0.20, P0.18, P0.16, P0.15 and P0.14."]
+    PARALLEL = 2,
+}
+impl From<TRACEMUX_A> for u8 {
+    #[inline(always)]
+    fn from(variant: TRACEMUX_A) -> Self {
+        variant as _
+    }
+}
+impl TRACEMUX_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<TRACEMUX_A> {
+        match self.bits {
+            0 => Some(TRACEMUX_A::GPIO),
+            1 => Some(TRACEMUX_A::SERIAL),
+            2 => Some(TRACEMUX_A::PARALLEL),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `GPIO`"]
+    #[inline(always)]
+    pub fn is_gpio(&self) -> bool {
+        *self == TRACEMUX_A::GPIO
+    }
+    #[doc = "Checks if the value of the field is `SERIAL`"]
+    #[inline(always)]
+    pub fn is_serial(&self) -> bool {
+        *self == TRACEMUX_A::SERIAL
+    }
+    #[doc = "Checks if the value of the field is `PARALLEL`"]
+    #[inline(always)]
+    pub fn is_parallel(&self) -> bool {
+        *self == TRACEMUX_A::PARALLEL
+    }
+}
+#[doc = "Field `TRACEMUX` writer - Pin multiplexing of trace signals."]
+pub type TRACEMUX_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, TRACECONFIG_SPEC, u8, TRACEMUX_A, 2, O>;
+impl<'a, const O: u8> TRACEMUX_W<'a, O> {
+    #[doc = "GPIOs multiplexed onto all trace-pins"]
+    #[inline(always)]
+    pub fn gpio(self) -> &'a mut W {
+        self.variant(TRACEMUX_A::GPIO)
+    }
+    #[doc = "SWO multiplexed onto P0.18, GPIO multiplexed onto other trace pins"]
+    #[inline(always)]
+    pub fn serial(self) -> &'a mut W {
+        self.variant(TRACEMUX_A::SERIAL)
+    }
+    #[doc = "TRACECLK and TRACEDATA multiplexed onto P0.20, P0.18, P0.16, P0.15 and P0.14."]
+    #[inline(always)]
+    pub fn parallel(self) -> &'a mut W {
+        self.variant(TRACEMUX_A::PARALLEL)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two."]
+    #[inline(always)]
+    pub fn traceportspeed(&self) -> TRACEPORTSPEED_R {
+        TRACEPORTSPEED_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bits 16:17 - Pin multiplexing of trace signals."]
+    #[inline(always)]
+    pub fn tracemux(&self) -> TRACEMUX_R {
+        TRACEMUX_R::new(((self.bits >> 16) & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Speed of Trace Port clock. Note that the TRACECLK pin will output this clock divided by two."]
+    #[inline(always)]
+    #[must_use]
+    pub fn traceportspeed(&mut self) -> TRACEPORTSPEED_W<0> {
+        TRACEPORTSPEED_W::new(self)
+    }
+    #[doc = "Bits 16:17 - Pin multiplexing of trace signals."]
+    #[inline(always)]
+    #[must_use]
+    pub fn tracemux(&mut self) -> TRACEMUX_W<16> {
+        TRACEMUX_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Clocking options for the Trace Port debug interface\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [traceconfig](index.html) module"]
+pub struct TRACECONFIG_SPEC;
+impl crate::RegisterSpec for TRACECONFIG_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [traceconfig::R](R) reader structure"]
+impl crate::Readable for TRACECONFIG_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [traceconfig::W](W) writer structure"]
+impl crate::Writable for TRACECONFIG_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TRACECONFIG to value 0"]
+impl crate::Resettable for TRACECONFIG_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp.rs

@@ -0,0 +1,130 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start comparator"]
+    pub tasks_start: TASKS_START,
+    #[doc = "0x04 - Stop comparator"]
+    pub tasks_stop: TASKS_STOP,
+    #[doc = "0x08 - Sample comparator value"]
+    pub tasks_sample: TASKS_SAMPLE,
+    _reserved3: [u8; 0xf4],
+    #[doc = "0x100 - COMP is ready and output is valid"]
+    pub events_ready: EVENTS_READY,
+    #[doc = "0x104 - Downward crossing"]
+    pub events_down: EVENTS_DOWN,
+    #[doc = "0x108 - Upward crossing"]
+    pub events_up: EVENTS_UP,
+    #[doc = "0x10c - Downward or upward crossing"]
+    pub events_cross: EVENTS_CROSS,
+    _reserved7: [u8; 0xf0],
+    #[doc = "0x200 - Shortcuts between local events and tasks"]
+    pub shorts: SHORTS,
+    _reserved8: [u8; 0xfc],
+    #[doc = "0x300 - Enable or disable interrupt"]
+    pub inten: INTEN,
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved11: [u8; 0xf4],
+    #[doc = "0x400 - Compare result"]
+    pub result: RESULT,
+    _reserved12: [u8; 0xfc],
+    #[doc = "0x500 - COMP enable"]
+    pub enable: ENABLE,
+    #[doc = "0x504 - Pin select"]
+    pub psel: PSEL,
+    #[doc = "0x508 - Reference source select for single-ended mode"]
+    pub refsel: REFSEL,
+    #[doc = "0x50c - External reference select"]
+    pub extrefsel: EXTREFSEL,
+    _reserved16: [u8; 0x20],
+    #[doc = "0x530 - Threshold configuration for hysteresis unit"]
+    pub th: TH,
+    #[doc = "0x534 - Mode configuration"]
+    pub mode: MODE,
+    #[doc = "0x538 - Comparator hysteresis enable"]
+    pub hyst: HYST,
+    #[doc = "0x53c - Current source select on analog input"]
+    pub isource: ISOURCE,
+}
+#[doc = "TASKS_START (w) register accessor: an alias for `Reg<TASKS_START_SPEC>`"]
+pub type TASKS_START = crate::Reg<tasks_start::TASKS_START_SPEC>;
+#[doc = "Start comparator"]
+pub mod tasks_start;
+#[doc = "TASKS_STOP (w) register accessor: an alias for `Reg<TASKS_STOP_SPEC>`"]
+pub type TASKS_STOP = crate::Reg<tasks_stop::TASKS_STOP_SPEC>;
+#[doc = "Stop comparator"]
+pub mod tasks_stop;
+#[doc = "TASKS_SAMPLE (w) register accessor: an alias for `Reg<TASKS_SAMPLE_SPEC>`"]
+pub type TASKS_SAMPLE = crate::Reg<tasks_sample::TASKS_SAMPLE_SPEC>;
+#[doc = "Sample comparator value"]
+pub mod tasks_sample;
+#[doc = "EVENTS_READY (rw) register accessor: an alias for `Reg<EVENTS_READY_SPEC>`"]
+pub type EVENTS_READY = crate::Reg<events_ready::EVENTS_READY_SPEC>;
+#[doc = "COMP is ready and output is valid"]
+pub mod events_ready;
+#[doc = "EVENTS_DOWN (rw) register accessor: an alias for `Reg<EVENTS_DOWN_SPEC>`"]
+pub type EVENTS_DOWN = crate::Reg<events_down::EVENTS_DOWN_SPEC>;
+#[doc = "Downward crossing"]
+pub mod events_down;
+#[doc = "EVENTS_UP (rw) register accessor: an alias for `Reg<EVENTS_UP_SPEC>`"]
+pub type EVENTS_UP = crate::Reg<events_up::EVENTS_UP_SPEC>;
+#[doc = "Upward crossing"]
+pub mod events_up;
+#[doc = "EVENTS_CROSS (rw) register accessor: an alias for `Reg<EVENTS_CROSS_SPEC>`"]
+pub type EVENTS_CROSS = crate::Reg<events_cross::EVENTS_CROSS_SPEC>;
+#[doc = "Downward or upward crossing"]
+pub mod events_cross;
+#[doc = "SHORTS (rw) register accessor: an alias for `Reg<SHORTS_SPEC>`"]
+pub type SHORTS = crate::Reg<shorts::SHORTS_SPEC>;
+#[doc = "Shortcuts between local events and tasks"]
+pub mod shorts;
+#[doc = "INTEN (rw) register accessor: an alias for `Reg<INTEN_SPEC>`"]
+pub type INTEN = crate::Reg<inten::INTEN_SPEC>;
+#[doc = "Enable or disable interrupt"]
+pub mod inten;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "RESULT (r) register accessor: an alias for `Reg<RESULT_SPEC>`"]
+pub type RESULT = crate::Reg<result::RESULT_SPEC>;
+#[doc = "Compare result"]
+pub mod result;
+#[doc = "ENABLE (rw) register accessor: an alias for `Reg<ENABLE_SPEC>`"]
+pub type ENABLE = crate::Reg<enable::ENABLE_SPEC>;
+#[doc = "COMP enable"]
+pub mod enable;
+#[doc = "PSEL (rw) register accessor: an alias for `Reg<PSEL_SPEC>`"]
+pub type PSEL = crate::Reg<psel::PSEL_SPEC>;
+#[doc = "Pin select"]
+pub mod psel;
+#[doc = "REFSEL (rw) register accessor: an alias for `Reg<REFSEL_SPEC>`"]
+pub type REFSEL = crate::Reg<refsel::REFSEL_SPEC>;
+#[doc = "Reference source select for single-ended mode"]
+pub mod refsel;
+#[doc = "EXTREFSEL (rw) register accessor: an alias for `Reg<EXTREFSEL_SPEC>`"]
+pub type EXTREFSEL = crate::Reg<extrefsel::EXTREFSEL_SPEC>;
+#[doc = "External reference select"]
+pub mod extrefsel;
+#[doc = "TH (rw) register accessor: an alias for `Reg<TH_SPEC>`"]
+pub type TH = crate::Reg<th::TH_SPEC>;
+#[doc = "Threshold configuration for hysteresis unit"]
+pub mod th;
+#[doc = "MODE (rw) register accessor: an alias for `Reg<MODE_SPEC>`"]
+pub type MODE = crate::Reg<mode::MODE_SPEC>;
+#[doc = "Mode configuration"]
+pub mod mode;
+#[doc = "HYST (rw) register accessor: an alias for `Reg<HYST_SPEC>`"]
+pub type HYST = crate::Reg<hyst::HYST_SPEC>;
+#[doc = "Comparator hysteresis enable"]
+pub mod hyst;
+#[doc = "ISOURCE (rw) register accessor: an alias for `Reg<ISOURCE_SPEC>`"]
+pub type ISOURCE = crate::Reg<isource::ISOURCE_SPEC>;
+#[doc = "Current source select on analog input"]
+pub mod isource;

down-the-stack/dk_pac/src/comp/enable.rs

@@ -0,0 +1,128 @@
+#[doc = "Register `ENABLE` reader"]
+pub struct R(crate::R<ENABLE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ENABLE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ENABLE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ENABLE` writer"]
+pub struct W(crate::W<ENABLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ENABLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ENABLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ENABLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENABLE` reader - Enable or disable COMP"]
+pub type ENABLE_R = crate::FieldReader<u8, ENABLE_A>;
+#[doc = "Enable or disable COMP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum ENABLE_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "2: Enable"]
+    ENABLED = 2,
+}
+impl From<ENABLE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ENABLE_A) -> Self {
+        variant as _
+    }
+}
+impl ENABLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<ENABLE_A> {
+        match self.bits {
+            0 => Some(ENABLE_A::DISABLED),
+            2 => Some(ENABLE_A::ENABLED),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENABLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENABLE_A::ENABLED
+    }
+}
+#[doc = "Field `ENABLE` writer - Enable or disable COMP"]
+pub type ENABLE_W<'a, const O: u8> = crate::FieldWriter<'a, u32, ENABLE_SPEC, u8, ENABLE_A, 2, O>;
+impl<'a, const O: u8> ENABLE_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(ENABLE_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Enable or disable COMP"]
+    #[inline(always)]
+    pub fn enable(&self) -> ENABLE_R {
+        ENABLE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Enable or disable COMP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn enable(&mut self) -> ENABLE_W<0> {
+        ENABLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "COMP enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [enable](index.html) module"]
+pub struct ENABLE_SPEC;
+impl crate::RegisterSpec for ENABLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [enable::R](R) reader structure"]
+impl crate::Readable for ENABLE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [enable::W](W) writer structure"]
+impl crate::Writable for ENABLE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ENABLE to value 0"]
+impl crate::Resettable for ENABLE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/events_cross.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_CROSS` reader"]
+pub struct R(crate::R<EVENTS_CROSS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_CROSS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_CROSS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_CROSS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_CROSS` writer"]
+pub struct W(crate::W<EVENTS_CROSS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_CROSS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_CROSS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_CROSS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_CROSS` reader - Downward or upward crossing"]
+pub type EVENTS_CROSS_R = crate::BitReader<EVENTS_CROSS_A>;
+#[doc = "Downward or upward crossing\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_CROSS_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_CROSS_A {
+        match self.bits {
+            false => EVENTS_CROSS_A::NOT_GENERATED,
+            true => EVENTS_CROSS_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_CROSS_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_CROSS_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_CROSS` writer - Downward or upward crossing"]
+pub type EVENTS_CROSS_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_CROSS_SPEC, EVENTS_CROSS_A, O>;
+impl<'a, const O: u8> EVENTS_CROSS_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_CROSS_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_CROSS_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Downward or upward crossing"]
+    #[inline(always)]
+    pub fn events_cross(&self) -> EVENTS_CROSS_R {
+        EVENTS_CROSS_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Downward or upward crossing"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_cross(&mut self) -> EVENTS_CROSS_W<0> {
+        EVENTS_CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Downward or upward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_cross](index.html) module"]
+pub struct EVENTS_CROSS_SPEC;
+impl crate::RegisterSpec for EVENTS_CROSS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_cross::R](R) reader structure"]
+impl crate::Readable for EVENTS_CROSS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_cross::W](W) writer structure"]
+impl crate::Writable for EVENTS_CROSS_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_CROSS to value 0"]
+impl crate::Resettable for EVENTS_CROSS_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/events_down.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_DOWN` reader"]
+pub struct R(crate::R<EVENTS_DOWN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_DOWN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_DOWN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_DOWN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_DOWN` writer"]
+pub struct W(crate::W<EVENTS_DOWN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_DOWN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_DOWN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_DOWN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_DOWN` reader - Downward crossing"]
+pub type EVENTS_DOWN_R = crate::BitReader<EVENTS_DOWN_A>;
+#[doc = "Downward crossing\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_DOWN_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_DOWN_A {
+        match self.bits {
+            false => EVENTS_DOWN_A::NOT_GENERATED,
+            true => EVENTS_DOWN_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_DOWN_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_DOWN_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_DOWN` writer - Downward crossing"]
+pub type EVENTS_DOWN_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_DOWN_SPEC, EVENTS_DOWN_A, O>;
+impl<'a, const O: u8> EVENTS_DOWN_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_DOWN_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_DOWN_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Downward crossing"]
+    #[inline(always)]
+    pub fn events_down(&self) -> EVENTS_DOWN_R {
+        EVENTS_DOWN_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Downward crossing"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_down(&mut self) -> EVENTS_DOWN_W<0> {
+        EVENTS_DOWN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Downward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_down](index.html) module"]
+pub struct EVENTS_DOWN_SPEC;
+impl crate::RegisterSpec for EVENTS_DOWN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_down::R](R) reader structure"]
+impl crate::Readable for EVENTS_DOWN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_down::W](W) writer structure"]
+impl crate::Writable for EVENTS_DOWN_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_DOWN to value 0"]
+impl crate::Resettable for EVENTS_DOWN_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/events_ready.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_READY` reader"]
+pub struct R(crate::R<EVENTS_READY_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_READY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_READY_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_READY_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_READY` writer"]
+pub struct W(crate::W<EVENTS_READY_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_READY_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_READY_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_READY_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_READY` reader - COMP is ready and output is valid"]
+pub type EVENTS_READY_R = crate::BitReader<EVENTS_READY_A>;
+#[doc = "COMP is ready and output is valid\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_READY_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_READY_A {
+        match self.bits {
+            false => EVENTS_READY_A::NOT_GENERATED,
+            true => EVENTS_READY_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_READY_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_READY_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_READY` writer - COMP is ready and output is valid"]
+pub type EVENTS_READY_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_READY_SPEC, EVENTS_READY_A, O>;
+impl<'a, const O: u8> EVENTS_READY_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_READY_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_READY_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - COMP is ready and output is valid"]
+    #[inline(always)]
+    pub fn events_ready(&self) -> EVENTS_READY_R {
+        EVENTS_READY_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - COMP is ready and output is valid"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_ready(&mut self) -> EVENTS_READY_W<0> {
+        EVENTS_READY_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "COMP is ready and output is valid\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_ready](index.html) module"]
+pub struct EVENTS_READY_SPEC;
+impl crate::RegisterSpec for EVENTS_READY_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_ready::R](R) reader structure"]
+impl crate::Readable for EVENTS_READY_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_ready::W](W) writer structure"]
+impl crate::Writable for EVENTS_READY_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_READY to value 0"]
+impl crate::Resettable for EVENTS_READY_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/events_up.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `EVENTS_UP` reader"]
+pub struct R(crate::R<EVENTS_UP_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_UP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_UP_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_UP_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_UP` writer"]
+pub struct W(crate::W<EVENTS_UP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_UP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_UP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_UP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_UP` reader - Upward crossing"]
+pub type EVENTS_UP_R = crate::BitReader<EVENTS_UP_A>;
+#[doc = "Upward crossing\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_UP_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_UP_A {
+        match self.bits {
+            false => EVENTS_UP_A::NOT_GENERATED,
+            true => EVENTS_UP_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_UP_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_UP_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_UP` writer - Upward crossing"]
+pub type EVENTS_UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, EVENTS_UP_SPEC, EVENTS_UP_A, O>;
+impl<'a, const O: u8> EVENTS_UP_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_UP_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_UP_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Upward crossing"]
+    #[inline(always)]
+    pub fn events_up(&self) -> EVENTS_UP_R {
+        EVENTS_UP_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Upward crossing"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_up(&mut self) -> EVENTS_UP_W<0> {
+        EVENTS_UP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Upward crossing\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_up](index.html) module"]
+pub struct EVENTS_UP_SPEC;
+impl crate::RegisterSpec for EVENTS_UP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_up::R](R) reader structure"]
+impl crate::Readable for EVENTS_UP_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_up::W](W) writer structure"]
+impl crate::Writable for EVENTS_UP_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_UP to value 0"]
+impl crate::Resettable for EVENTS_UP_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/extrefsel.rs

@@ -0,0 +1,207 @@
+#[doc = "Register `EXTREFSEL` reader"]
+pub struct R(crate::R<EXTREFSEL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EXTREFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EXTREFSEL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EXTREFSEL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EXTREFSEL` writer"]
+pub struct W(crate::W<EXTREFSEL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EXTREFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EXTREFSEL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EXTREFSEL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EXTREFSEL` reader - External analog reference select"]
+pub type EXTREFSEL_R = crate::FieldReader<u8, EXTREFSEL_A>;
+#[doc = "External analog reference select\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum EXTREFSEL_A {
+    #[doc = "0: Use AIN0 as external analog reference"]
+    ANALOG_REFERENCE0 = 0,
+    #[doc = "1: Use AIN1 as external analog reference"]
+    ANALOG_REFERENCE1 = 1,
+    #[doc = "2: Use AIN2 as external analog reference"]
+    ANALOG_REFERENCE2 = 2,
+    #[doc = "3: Use AIN3 as external analog reference"]
+    ANALOG_REFERENCE3 = 3,
+    #[doc = "4: Use AIN4 as external analog reference"]
+    ANALOG_REFERENCE4 = 4,
+    #[doc = "5: Use AIN5 as external analog reference"]
+    ANALOG_REFERENCE5 = 5,
+    #[doc = "6: Use AIN6 as external analog reference"]
+    ANALOG_REFERENCE6 = 6,
+    #[doc = "7: Use AIN7 as external analog reference"]
+    ANALOG_REFERENCE7 = 7,
+}
+impl From<EXTREFSEL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: EXTREFSEL_A) -> Self {
+        variant as _
+    }
+}
+impl EXTREFSEL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EXTREFSEL_A {
+        match self.bits {
+            0 => EXTREFSEL_A::ANALOG_REFERENCE0,
+            1 => EXTREFSEL_A::ANALOG_REFERENCE1,
+            2 => EXTREFSEL_A::ANALOG_REFERENCE2,
+            3 => EXTREFSEL_A::ANALOG_REFERENCE3,
+            4 => EXTREFSEL_A::ANALOG_REFERENCE4,
+            5 => EXTREFSEL_A::ANALOG_REFERENCE5,
+            6 => EXTREFSEL_A::ANALOG_REFERENCE6,
+            7 => EXTREFSEL_A::ANALOG_REFERENCE7,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE0`"]
+    #[inline(always)]
+    pub fn is_analog_reference0(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE0
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE1`"]
+    #[inline(always)]
+    pub fn is_analog_reference1(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE1
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE2`"]
+    #[inline(always)]
+    pub fn is_analog_reference2(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE2
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE3`"]
+    #[inline(always)]
+    pub fn is_analog_reference3(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE3
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE4`"]
+    #[inline(always)]
+    pub fn is_analog_reference4(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE4
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE5`"]
+    #[inline(always)]
+    pub fn is_analog_reference5(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE5
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE6`"]
+    #[inline(always)]
+    pub fn is_analog_reference6(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE6
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_REFERENCE7`"]
+    #[inline(always)]
+    pub fn is_analog_reference7(&self) -> bool {
+        *self == EXTREFSEL_A::ANALOG_REFERENCE7
+    }
+}
+#[doc = "Field `EXTREFSEL` writer - External analog reference select"]
+pub type EXTREFSEL_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, EXTREFSEL_SPEC, u8, EXTREFSEL_A, 3, O>;
+impl<'a, const O: u8> EXTREFSEL_W<'a, O> {
+    #[doc = "Use AIN0 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference0(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE0)
+    }
+    #[doc = "Use AIN1 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference1(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE1)
+    }
+    #[doc = "Use AIN2 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference2(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE2)
+    }
+    #[doc = "Use AIN3 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference3(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE3)
+    }
+    #[doc = "Use AIN4 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference4(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE4)
+    }
+    #[doc = "Use AIN5 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference5(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE5)
+    }
+    #[doc = "Use AIN6 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference6(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE6)
+    }
+    #[doc = "Use AIN7 as external analog reference"]
+    #[inline(always)]
+    pub fn analog_reference7(self) -> &'a mut W {
+        self.variant(EXTREFSEL_A::ANALOG_REFERENCE7)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - External analog reference select"]
+    #[inline(always)]
+    pub fn extrefsel(&self) -> EXTREFSEL_R {
+        EXTREFSEL_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - External analog reference select"]
+    #[inline(always)]
+    #[must_use]
+    pub fn extrefsel(&mut self) -> EXTREFSEL_W<0> {
+        EXTREFSEL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "External reference select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [extrefsel](index.html) module"]
+pub struct EXTREFSEL_SPEC;
+impl crate::RegisterSpec for EXTREFSEL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [extrefsel::R](R) reader structure"]
+impl crate::Readable for EXTREFSEL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [extrefsel::W](W) writer structure"]
+impl crate::Writable for EXTREFSEL_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EXTREFSEL to value 0"]
+impl crate::Resettable for EXTREFSEL_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/hyst.rs

@@ -0,0 +1,126 @@
+#[doc = "Register `HYST` reader"]
+pub struct R(crate::R<HYST_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<HYST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<HYST_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<HYST_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `HYST` writer"]
+pub struct W(crate::W<HYST_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<HYST_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<HYST_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<HYST_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `HYST` reader - Comparator hysteresis"]
+pub type HYST_R = crate::BitReader<HYST_A>;
+#[doc = "Comparator hysteresis\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum HYST_A {
+    #[doc = "0: Comparator hysteresis disabled"]
+    NO_HYST = 0,
+    #[doc = "1: Comparator hysteresis enabled"]
+    HYST50M_V = 1,
+}
+impl From<HYST_A> for bool {
+    #[inline(always)]
+    fn from(variant: HYST_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl HYST_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> HYST_A {
+        match self.bits {
+            false => HYST_A::NO_HYST,
+            true => HYST_A::HYST50M_V,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NO_HYST`"]
+    #[inline(always)]
+    pub fn is_no_hyst(&self) -> bool {
+        *self == HYST_A::NO_HYST
+    }
+    #[doc = "Checks if the value of the field is `HYST50M_V`"]
+    #[inline(always)]
+    pub fn is_hyst50m_v(&self) -> bool {
+        *self == HYST_A::HYST50M_V
+    }
+}
+#[doc = "Field `HYST` writer - Comparator hysteresis"]
+pub type HYST_W<'a, const O: u8> = crate::BitWriter<'a, u32, HYST_SPEC, HYST_A, O>;
+impl<'a, const O: u8> HYST_W<'a, O> {
+    #[doc = "Comparator hysteresis disabled"]
+    #[inline(always)]
+    pub fn no_hyst(self) -> &'a mut W {
+        self.variant(HYST_A::NO_HYST)
+    }
+    #[doc = "Comparator hysteresis enabled"]
+    #[inline(always)]
+    pub fn hyst50m_v(self) -> &'a mut W {
+        self.variant(HYST_A::HYST50M_V)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Comparator hysteresis"]
+    #[inline(always)]
+    pub fn hyst(&self) -> HYST_R {
+        HYST_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Comparator hysteresis"]
+    #[inline(always)]
+    #[must_use]
+    pub fn hyst(&mut self) -> HYST_W<0> {
+        HYST_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Comparator hysteresis enable\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [hyst](index.html) module"]
+pub struct HYST_SPEC;
+impl crate::RegisterSpec for HYST_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [hyst::R](R) reader structure"]
+impl crate::Readable for HYST_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [hyst::W](W) writer structure"]
+impl crate::Writable for HYST_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets HYST to value 0"]
+impl crate::Resettable for HYST_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/inten.rs

@@ -0,0 +1,309 @@
+#[doc = "Register `INTEN` reader"]
+pub struct R(crate::R<INTEN_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTEN_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTEN_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTEN` writer"]
+pub struct W(crate::W<INTEN_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTEN_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTEN_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTEN_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY` reader - Enable or disable interrupt for event READY"]
+pub type READY_R = crate::BitReader<READY_A>;
+#[doc = "Enable or disable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum READY_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_A {
+        match self.bits {
+            false => READY_A::DISABLED,
+            true => READY_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_A::ENABLED
+    }
+}
+#[doc = "Field `READY` writer - Enable or disable interrupt for event READY"]
+pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, READY_A, O>;
+impl<'a, const O: u8> READY_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(READY_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(READY_A::ENABLED)
+    }
+}
+#[doc = "Field `DOWN` reader - Enable or disable interrupt for event DOWN"]
+pub type DOWN_R = crate::BitReader<DOWN_A>;
+#[doc = "Enable or disable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DOWN_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_A {
+        match self.bits {
+            false => DOWN_A::DISABLED,
+            true => DOWN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_A::ENABLED
+    }
+}
+#[doc = "Field `DOWN` writer - Enable or disable interrupt for event DOWN"]
+pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, DOWN_A, O>;
+impl<'a, const O: u8> DOWN_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DOWN_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DOWN_A::ENABLED)
+    }
+}
+#[doc = "Field `UP` reader - Enable or disable interrupt for event UP"]
+pub type UP_R = crate::BitReader<UP_A>;
+#[doc = "Enable or disable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum UP_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_A {
+        match self.bits {
+            false => UP_A::DISABLED,
+            true => UP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_A::ENABLED
+    }
+}
+#[doc = "Field `UP` writer - Enable or disable interrupt for event UP"]
+pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, UP_A, O>;
+impl<'a, const O: u8> UP_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(UP_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(UP_A::ENABLED)
+    }
+}
+#[doc = "Field `CROSS` reader - Enable or disable interrupt for event CROSS"]
+pub type CROSS_R = crate::BitReader<CROSS_A>;
+#[doc = "Enable or disable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CROSS_A {
+    #[doc = "0: Disable"]
+    DISABLED = 0,
+    #[doc = "1: Enable"]
+    ENABLED = 1,
+}
+impl From<CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_A {
+        match self.bits {
+            false => CROSS_A::DISABLED,
+            true => CROSS_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_A::ENABLED
+    }
+}
+#[doc = "Field `CROSS` writer - Enable or disable interrupt for event CROSS"]
+pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTEN_SPEC, CROSS_A, O>;
+impl<'a, const O: u8> CROSS_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CROSS_A::DISABLED)
+    }
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CROSS_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Enable or disable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&self) -> READY_R {
+        READY_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&self) -> DOWN_R {
+        DOWN_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&self) -> UP_R {
+        UP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Enable or disable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&self) -> CROSS_R {
+        CROSS_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Enable or disable interrupt for event READY"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ready(&mut self) -> READY_W<0> {
+        READY_W::new(self)
+    }
+    #[doc = "Bit 1 - Enable or disable interrupt for event DOWN"]
+    #[inline(always)]
+    #[must_use]
+    pub fn down(&mut self) -> DOWN_W<1> {
+        DOWN_W::new(self)
+    }
+    #[doc = "Bit 2 - Enable or disable interrupt for event UP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn up(&mut self) -> UP_W<2> {
+        UP_W::new(self)
+    }
+    #[doc = "Bit 3 - Enable or disable interrupt for event CROSS"]
+    #[inline(always)]
+    #[must_use]
+    pub fn cross(&mut self) -> CROSS_W<3> {
+        CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable or disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [inten](index.html) module"]
+pub struct INTEN_SPEC;
+impl crate::RegisterSpec for INTEN_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [inten::R](R) reader structure"]
+impl crate::Readable for INTEN_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [inten::W](W) writer structure"]
+impl crate::Writable for INTEN_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTEN to value 0"]
+impl crate::Resettable for INTEN_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/intenclr.rs

@@ -0,0 +1,337 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY` reader - Write '1' to disable interrupt for event READY"]
+pub type READY_R = crate::BitReader<READY_A>;
+#[doc = "Write '1' to disable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum READY_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_A {
+        match self.bits {
+            false => READY_A::DISABLED,
+            true => READY_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum READY_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<READY_AW> for bool {
+    #[inline(always)]
+    fn from(variant: READY_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `READY` writer - Write '1' to disable interrupt for event READY"]
+pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, READY_AW, O>;
+impl<'a, const O: u8> READY_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(READY_AW::CLEAR)
+    }
+}
+#[doc = "Field `DOWN` reader - Write '1' to disable interrupt for event DOWN"]
+pub type DOWN_R = crate::BitReader<DOWN_A>;
+#[doc = "Write '1' to disable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DOWN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_A {
+        match self.bits {
+            false => DOWN_A::DISABLED,
+            true => DOWN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DOWN_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<DOWN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DOWN` writer - Write '1' to disable interrupt for event DOWN"]
+pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, DOWN_AW, O>;
+impl<'a, const O: u8> DOWN_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(DOWN_AW::CLEAR)
+    }
+}
+#[doc = "Field `UP` reader - Write '1' to disable interrupt for event UP"]
+pub type UP_R = crate::BitReader<UP_A>;
+#[doc = "Write '1' to disable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum UP_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_A {
+        match self.bits {
+            false => UP_A::DISABLED,
+            true => UP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum UP_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<UP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UP` writer - Write '1' to disable interrupt for event UP"]
+pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, UP_AW, O>;
+impl<'a, const O: u8> UP_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(UP_AW::CLEAR)
+    }
+}
+#[doc = "Field `CROSS` reader - Write '1' to disable interrupt for event CROSS"]
+pub type CROSS_R = crate::BitReader<CROSS_A>;
+#[doc = "Write '1' to disable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CROSS_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_A {
+        match self.bits {
+            false => CROSS_A::DISABLED,
+            true => CROSS_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CROSS_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<CROSS_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CROSS` writer - Write '1' to disable interrupt for event CROSS"]
+pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, CROSS_AW, O>;
+impl<'a, const O: u8> CROSS_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(CROSS_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&self) -> READY_R {
+        READY_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&self) -> DOWN_R {
+        DOWN_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&self) -> UP_R {
+        UP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&self) -> CROSS_R {
+        CROSS_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event READY"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ready(&mut self) -> READY_W<0> {
+        READY_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event DOWN"]
+    #[inline(always)]
+    #[must_use]
+    pub fn down(&mut self) -> DOWN_W<1> {
+        DOWN_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to disable interrupt for event UP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn up(&mut self) -> UP_W<2> {
+        UP_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to disable interrupt for event CROSS"]
+    #[inline(always)]
+    #[must_use]
+    pub fn cross(&mut self) -> CROSS_W<3> {
+        CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/intenset.rs

@@ -0,0 +1,337 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY` reader - Write '1' to enable interrupt for event READY"]
+pub type READY_R = crate::BitReader<READY_A>;
+#[doc = "Write '1' to enable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum READY_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<READY_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_A {
+        match self.bits {
+            false => READY_A::DISABLED,
+            true => READY_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event READY\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum READY_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<READY_AW> for bool {
+    #[inline(always)]
+    fn from(variant: READY_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `READY` writer - Write '1' to enable interrupt for event READY"]
+pub type READY_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, READY_AW, O>;
+impl<'a, const O: u8> READY_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(READY_AW::SET)
+    }
+}
+#[doc = "Field `DOWN` reader - Write '1' to enable interrupt for event DOWN"]
+pub type DOWN_R = crate::BitReader<DOWN_A>;
+#[doc = "Write '1' to enable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DOWN_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<DOWN_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_A {
+        match self.bits {
+            false => DOWN_A::DISABLED,
+            true => DOWN_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event DOWN\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DOWN_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<DOWN_AW> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `DOWN` writer - Write '1' to enable interrupt for event DOWN"]
+pub type DOWN_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, DOWN_AW, O>;
+impl<'a, const O: u8> DOWN_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(DOWN_AW::SET)
+    }
+}
+#[doc = "Field `UP` reader - Write '1' to enable interrupt for event UP"]
+pub type UP_R = crate::BitReader<UP_A>;
+#[doc = "Write '1' to enable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum UP_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<UP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_A {
+        match self.bits {
+            false => UP_A::DISABLED,
+            true => UP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event UP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum UP_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<UP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: UP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `UP` writer - Write '1' to enable interrupt for event UP"]
+pub type UP_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, UP_AW, O>;
+impl<'a, const O: u8> UP_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(UP_AW::SET)
+    }
+}
+#[doc = "Field `CROSS` reader - Write '1' to enable interrupt for event CROSS"]
+pub type CROSS_R = crate::BitReader<CROSS_A>;
+#[doc = "Write '1' to enable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CROSS_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<CROSS_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_A {
+        match self.bits {
+            false => CROSS_A::DISABLED,
+            true => CROSS_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event CROSS\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CROSS_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<CROSS_AW> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `CROSS` writer - Write '1' to enable interrupt for event CROSS"]
+pub type CROSS_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, CROSS_AW, O>;
+impl<'a, const O: u8> CROSS_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(CROSS_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event READY"]
+    #[inline(always)]
+    pub fn ready(&self) -> READY_R {
+        READY_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event DOWN"]
+    #[inline(always)]
+    pub fn down(&self) -> DOWN_R {
+        DOWN_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event UP"]
+    #[inline(always)]
+    pub fn up(&self) -> UP_R {
+        UP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event CROSS"]
+    #[inline(always)]
+    pub fn cross(&self) -> CROSS_R {
+        CROSS_R::new(((self.bits >> 3) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event READY"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ready(&mut self) -> READY_W<0> {
+        READY_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event DOWN"]
+    #[inline(always)]
+    #[must_use]
+    pub fn down(&mut self) -> DOWN_W<1> {
+        DOWN_W::new(self)
+    }
+    #[doc = "Bit 2 - Write '1' to enable interrupt for event UP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn up(&mut self) -> UP_W<2> {
+        UP_W::new(self)
+    }
+    #[doc = "Bit 3 - Write '1' to enable interrupt for event CROSS"]
+    #[inline(always)]
+    #[must_use]
+    pub fn cross(&mut self) -> CROSS_W<3> {
+        CROSS_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/isource.rs

@@ -0,0 +1,155 @@
+#[doc = "Register `ISOURCE` reader"]
+pub struct R(crate::R<ISOURCE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ISOURCE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ISOURCE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ISOURCE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ISOURCE` writer"]
+pub struct W(crate::W<ISOURCE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ISOURCE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ISOURCE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ISOURCE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ISOURCE` reader - Comparator hysteresis"]
+pub type ISOURCE_R = crate::FieldReader<u8, ISOURCE_A>;
+#[doc = "Comparator hysteresis\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum ISOURCE_A {
+    #[doc = "0: Current source disabled"]
+    OFF = 0,
+    #[doc = "1: Current source enabled (+/- 2.5 uA)"]
+    IEN2M_A5 = 1,
+    #[doc = "2: Current source enabled (+/- 5 uA)"]
+    IEN5M_A = 2,
+    #[doc = "3: Current source enabled (+/- 10 uA)"]
+    IEN10M_A = 3,
+}
+impl From<ISOURCE_A> for u8 {
+    #[inline(always)]
+    fn from(variant: ISOURCE_A) -> Self {
+        variant as _
+    }
+}
+impl ISOURCE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ISOURCE_A {
+        match self.bits {
+            0 => ISOURCE_A::OFF,
+            1 => ISOURCE_A::IEN2M_A5,
+            2 => ISOURCE_A::IEN5M_A,
+            3 => ISOURCE_A::IEN10M_A,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `OFF`"]
+    #[inline(always)]
+    pub fn is_off(&self) -> bool {
+        *self == ISOURCE_A::OFF
+    }
+    #[doc = "Checks if the value of the field is `IEN2M_A5`"]
+    #[inline(always)]
+    pub fn is_ien2m_a5(&self) -> bool {
+        *self == ISOURCE_A::IEN2M_A5
+    }
+    #[doc = "Checks if the value of the field is `IEN5M_A`"]
+    #[inline(always)]
+    pub fn is_ien5m_a(&self) -> bool {
+        *self == ISOURCE_A::IEN5M_A
+    }
+    #[doc = "Checks if the value of the field is `IEN10M_A`"]
+    #[inline(always)]
+    pub fn is_ien10m_a(&self) -> bool {
+        *self == ISOURCE_A::IEN10M_A
+    }
+}
+#[doc = "Field `ISOURCE` writer - Comparator hysteresis"]
+pub type ISOURCE_W<'a, const O: u8> =
+    crate::FieldWriterSafe<'a, u32, ISOURCE_SPEC, u8, ISOURCE_A, 2, O>;
+impl<'a, const O: u8> ISOURCE_W<'a, O> {
+    #[doc = "Current source disabled"]
+    #[inline(always)]
+    pub fn off(self) -> &'a mut W {
+        self.variant(ISOURCE_A::OFF)
+    }
+    #[doc = "Current source enabled (+/- 2.5 uA)"]
+    #[inline(always)]
+    pub fn ien2m_a5(self) -> &'a mut W {
+        self.variant(ISOURCE_A::IEN2M_A5)
+    }
+    #[doc = "Current source enabled (+/- 5 uA)"]
+    #[inline(always)]
+    pub fn ien5m_a(self) -> &'a mut W {
+        self.variant(ISOURCE_A::IEN5M_A)
+    }
+    #[doc = "Current source enabled (+/- 10 uA)"]
+    #[inline(always)]
+    pub fn ien10m_a(self) -> &'a mut W {
+        self.variant(ISOURCE_A::IEN10M_A)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Comparator hysteresis"]
+    #[inline(always)]
+    pub fn isource(&self) -> ISOURCE_R {
+        ISOURCE_R::new((self.bits & 3) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Comparator hysteresis"]
+    #[inline(always)]
+    #[must_use]
+    pub fn isource(&mut self) -> ISOURCE_W<0> {
+        ISOURCE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Current source select on analog input\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [isource](index.html) module"]
+pub struct ISOURCE_SPEC;
+impl crate::RegisterSpec for ISOURCE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [isource::R](R) reader structure"]
+impl crate::Readable for ISOURCE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [isource::W](W) writer structure"]
+impl crate::Writable for ISOURCE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ISOURCE to value 0"]
+impl crate::Resettable for ISOURCE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/mode.rs

@@ -0,0 +1,202 @@
+#[doc = "Register `MODE` reader"]
+pub struct R(crate::R<MODE_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<MODE_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<MODE_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `MODE` writer"]
+pub struct W(crate::W<MODE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<MODE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<MODE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<MODE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `SP` reader - Speed and power modes"]
+pub type SP_R = crate::FieldReader<u8, SP_A>;
+#[doc = "Speed and power modes\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum SP_A {
+    #[doc = "0: Low-power mode"]
+    LOW = 0,
+    #[doc = "1: Normal mode"]
+    NORMAL = 1,
+    #[doc = "2: High-speed mode"]
+    HIGH = 2,
+}
+impl From<SP_A> for u8 {
+    #[inline(always)]
+    fn from(variant: SP_A) -> Self {
+        variant as _
+    }
+}
+impl SP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<SP_A> {
+        match self.bits {
+            0 => Some(SP_A::LOW),
+            1 => Some(SP_A::NORMAL),
+            2 => Some(SP_A::HIGH),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `LOW`"]
+    #[inline(always)]
+    pub fn is_low(&self) -> bool {
+        *self == SP_A::LOW
+    }
+    #[doc = "Checks if the value of the field is `NORMAL`"]
+    #[inline(always)]
+    pub fn is_normal(&self) -> bool {
+        *self == SP_A::NORMAL
+    }
+    #[doc = "Checks if the value of the field is `HIGH`"]
+    #[inline(always)]
+    pub fn is_high(&self) -> bool {
+        *self == SP_A::HIGH
+    }
+}
+#[doc = "Field `SP` writer - Speed and power modes"]
+pub type SP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, MODE_SPEC, u8, SP_A, 2, O>;
+impl<'a, const O: u8> SP_W<'a, O> {
+    #[doc = "Low-power mode"]
+    #[inline(always)]
+    pub fn low(self) -> &'a mut W {
+        self.variant(SP_A::LOW)
+    }
+    #[doc = "Normal mode"]
+    #[inline(always)]
+    pub fn normal(self) -> &'a mut W {
+        self.variant(SP_A::NORMAL)
+    }
+    #[doc = "High-speed mode"]
+    #[inline(always)]
+    pub fn high(self) -> &'a mut W {
+        self.variant(SP_A::HIGH)
+    }
+}
+#[doc = "Field `MAIN` reader - Main operation modes"]
+pub type MAIN_R = crate::BitReader<MAIN_A>;
+#[doc = "Main operation modes\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum MAIN_A {
+    #[doc = "0: Single-ended mode"]
+    SE = 0,
+    #[doc = "1: Differential mode"]
+    DIFF = 1,
+}
+impl From<MAIN_A> for bool {
+    #[inline(always)]
+    fn from(variant: MAIN_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl MAIN_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> MAIN_A {
+        match self.bits {
+            false => MAIN_A::SE,
+            true => MAIN_A::DIFF,
+        }
+    }
+    #[doc = "Checks if the value of the field is `SE`"]
+    #[inline(always)]
+    pub fn is_se(&self) -> bool {
+        *self == MAIN_A::SE
+    }
+    #[doc = "Checks if the value of the field is `DIFF`"]
+    #[inline(always)]
+    pub fn is_diff(&self) -> bool {
+        *self == MAIN_A::DIFF
+    }
+}
+#[doc = "Field `MAIN` writer - Main operation modes"]
+pub type MAIN_W<'a, const O: u8> = crate::BitWriter<'a, u32, MODE_SPEC, MAIN_A, O>;
+impl<'a, const O: u8> MAIN_W<'a, O> {
+    #[doc = "Single-ended mode"]
+    #[inline(always)]
+    pub fn se(self) -> &'a mut W {
+        self.variant(MAIN_A::SE)
+    }
+    #[doc = "Differential mode"]
+    #[inline(always)]
+    pub fn diff(self) -> &'a mut W {
+        self.variant(MAIN_A::DIFF)
+    }
+}
+impl R {
+    #[doc = "Bits 0:1 - Speed and power modes"]
+    #[inline(always)]
+    pub fn sp(&self) -> SP_R {
+        SP_R::new((self.bits & 3) as u8)
+    }
+    #[doc = "Bit 8 - Main operation modes"]
+    #[inline(always)]
+    pub fn main(&self) -> MAIN_R {
+        MAIN_R::new(((self.bits >> 8) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bits 0:1 - Speed and power modes"]
+    #[inline(always)]
+    #[must_use]
+    pub fn sp(&mut self) -> SP_W<0> {
+        SP_W::new(self)
+    }
+    #[doc = "Bit 8 - Main operation modes"]
+    #[inline(always)]
+    #[must_use]
+    pub fn main(&mut self) -> MAIN_W<8> {
+        MAIN_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Mode configuration\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [mode](index.html) module"]
+pub struct MODE_SPEC;
+impl crate::RegisterSpec for MODE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [mode::R](R) reader structure"]
+impl crate::Readable for MODE_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [mode::W](W) writer structure"]
+impl crate::Writable for MODE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets MODE to value 0"]
+impl crate::Resettable for MODE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/psel.rs

@@ -0,0 +1,206 @@
+#[doc = "Register `PSEL` reader"]
+pub struct R(crate::R<PSEL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<PSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<PSEL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<PSEL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `PSEL` writer"]
+pub struct W(crate::W<PSEL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<PSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<PSEL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<PSEL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `PSEL` reader - Analog pin select"]
+pub type PSEL_R = crate::FieldReader<u8, PSEL_A>;
+#[doc = "Analog pin select\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum PSEL_A {
+    #[doc = "0: AIN0 selected as analog input"]
+    ANALOG_INPUT0 = 0,
+    #[doc = "1: AIN1 selected as analog input"]
+    ANALOG_INPUT1 = 1,
+    #[doc = "2: AIN2 selected as analog input"]
+    ANALOG_INPUT2 = 2,
+    #[doc = "3: AIN3 selected as analog input"]
+    ANALOG_INPUT3 = 3,
+    #[doc = "4: AIN4 selected as analog input"]
+    ANALOG_INPUT4 = 4,
+    #[doc = "5: AIN5 selected as analog input"]
+    ANALOG_INPUT5 = 5,
+    #[doc = "6: AIN6 selected as analog input"]
+    ANALOG_INPUT6 = 6,
+    #[doc = "7: AIN7 selected as analog input"]
+    ANALOG_INPUT7 = 7,
+}
+impl From<PSEL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: PSEL_A) -> Self {
+        variant as _
+    }
+}
+impl PSEL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> PSEL_A {
+        match self.bits {
+            0 => PSEL_A::ANALOG_INPUT0,
+            1 => PSEL_A::ANALOG_INPUT1,
+            2 => PSEL_A::ANALOG_INPUT2,
+            3 => PSEL_A::ANALOG_INPUT3,
+            4 => PSEL_A::ANALOG_INPUT4,
+            5 => PSEL_A::ANALOG_INPUT5,
+            6 => PSEL_A::ANALOG_INPUT6,
+            7 => PSEL_A::ANALOG_INPUT7,
+            _ => unreachable!(),
+        }
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT0`"]
+    #[inline(always)]
+    pub fn is_analog_input0(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT0
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT1`"]
+    #[inline(always)]
+    pub fn is_analog_input1(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT1
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT2`"]
+    #[inline(always)]
+    pub fn is_analog_input2(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT2
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT3`"]
+    #[inline(always)]
+    pub fn is_analog_input3(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT3
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT4`"]
+    #[inline(always)]
+    pub fn is_analog_input4(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT4
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT5`"]
+    #[inline(always)]
+    pub fn is_analog_input5(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT5
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT6`"]
+    #[inline(always)]
+    pub fn is_analog_input6(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT6
+    }
+    #[doc = "Checks if the value of the field is `ANALOG_INPUT7`"]
+    #[inline(always)]
+    pub fn is_analog_input7(&self) -> bool {
+        *self == PSEL_A::ANALOG_INPUT7
+    }
+}
+#[doc = "Field `PSEL` writer - Analog pin select"]
+pub type PSEL_W<'a, const O: u8> = crate::FieldWriterSafe<'a, u32, PSEL_SPEC, u8, PSEL_A, 3, O>;
+impl<'a, const O: u8> PSEL_W<'a, O> {
+    #[doc = "AIN0 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input0(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT0)
+    }
+    #[doc = "AIN1 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input1(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT1)
+    }
+    #[doc = "AIN2 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input2(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT2)
+    }
+    #[doc = "AIN3 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input3(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT3)
+    }
+    #[doc = "AIN4 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input4(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT4)
+    }
+    #[doc = "AIN5 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input5(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT5)
+    }
+    #[doc = "AIN6 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input6(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT6)
+    }
+    #[doc = "AIN7 selected as analog input"]
+    #[inline(always)]
+    pub fn analog_input7(self) -> &'a mut W {
+        self.variant(PSEL_A::ANALOG_INPUT7)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Analog pin select"]
+    #[inline(always)]
+    pub fn psel(&self) -> PSEL_R {
+        PSEL_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Analog pin select"]
+    #[inline(always)]
+    #[must_use]
+    pub fn psel(&mut self) -> PSEL_W<0> {
+        PSEL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Pin select\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [psel](index.html) module"]
+pub struct PSEL_SPEC;
+impl crate::RegisterSpec for PSEL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [psel::R](R) reader structure"]
+impl crate::Readable for PSEL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [psel::W](W) writer structure"]
+impl crate::Writable for PSEL_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets PSEL to value 0"]
+impl crate::Resettable for PSEL_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/refsel.rs

@@ -0,0 +1,167 @@
+#[doc = "Register `REFSEL` reader"]
+pub struct R(crate::R<REFSEL_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<REFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<REFSEL_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<REFSEL_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `REFSEL` writer"]
+pub struct W(crate::W<REFSEL_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<REFSEL_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<REFSEL_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<REFSEL_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `REFSEL` reader - Reference select"]
+pub type REFSEL_R = crate::FieldReader<u8, REFSEL_A>;
+#[doc = "Reference select\n\nValue on reset: 4"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+#[repr(u8)]
+pub enum REFSEL_A {
+    #[doc = "0: VREF = internal 1.2 V reference (VDD &gt;= 1.7 V)"]
+    INT1V2 = 0,
+    #[doc = "1: VREF = internal 1.8 V reference (VDD &gt;= VREF + 0.2 V)"]
+    INT1V8 = 1,
+    #[doc = "2: VREF = internal 2.4 V reference (VDD &gt;= VREF + 0.2 V)"]
+    INT2V4 = 2,
+    #[doc = "4: VREF = VDD"]
+    VDD = 4,
+    #[doc = "7: VREF = AREF (VDD &gt;= VREF &gt;= AREFMIN)"]
+    AREF = 7,
+}
+impl From<REFSEL_A> for u8 {
+    #[inline(always)]
+    fn from(variant: REFSEL_A) -> Self {
+        variant as _
+    }
+}
+impl REFSEL_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> Option<REFSEL_A> {
+        match self.bits {
+            0 => Some(REFSEL_A::INT1V2),
+            1 => Some(REFSEL_A::INT1V8),
+            2 => Some(REFSEL_A::INT2V4),
+            4 => Some(REFSEL_A::VDD),
+            7 => Some(REFSEL_A::AREF),
+            _ => None,
+        }
+    }
+    #[doc = "Checks if the value of the field is `INT1V2`"]
+    #[inline(always)]
+    pub fn is_int1v2(&self) -> bool {
+        *self == REFSEL_A::INT1V2
+    }
+    #[doc = "Checks if the value of the field is `INT1V8`"]
+    #[inline(always)]
+    pub fn is_int1v8(&self) -> bool {
+        *self == REFSEL_A::INT1V8
+    }
+    #[doc = "Checks if the value of the field is `INT2V4`"]
+    #[inline(always)]
+    pub fn is_int2v4(&self) -> bool {
+        *self == REFSEL_A::INT2V4
+    }
+    #[doc = "Checks if the value of the field is `VDD`"]
+    #[inline(always)]
+    pub fn is_vdd(&self) -> bool {
+        *self == REFSEL_A::VDD
+    }
+    #[doc = "Checks if the value of the field is `AREF`"]
+    #[inline(always)]
+    pub fn is_aref(&self) -> bool {
+        *self == REFSEL_A::AREF
+    }
+}
+#[doc = "Field `REFSEL` writer - Reference select"]
+pub type REFSEL_W<'a, const O: u8> = crate::FieldWriter<'a, u32, REFSEL_SPEC, u8, REFSEL_A, 3, O>;
+impl<'a, const O: u8> REFSEL_W<'a, O> {
+    #[doc = "VREF = internal 1.2 V reference (VDD &gt;= 1.7 V)"]
+    #[inline(always)]
+    pub fn int1v2(self) -> &'a mut W {
+        self.variant(REFSEL_A::INT1V2)
+    }
+    #[doc = "VREF = internal 1.8 V reference (VDD &gt;= VREF + 0.2 V)"]
+    #[inline(always)]
+    pub fn int1v8(self) -> &'a mut W {
+        self.variant(REFSEL_A::INT1V8)
+    }
+    #[doc = "VREF = internal 2.4 V reference (VDD &gt;= VREF + 0.2 V)"]
+    #[inline(always)]
+    pub fn int2v4(self) -> &'a mut W {
+        self.variant(REFSEL_A::INT2V4)
+    }
+    #[doc = "VREF = VDD"]
+    #[inline(always)]
+    pub fn vdd(self) -> &'a mut W {
+        self.variant(REFSEL_A::VDD)
+    }
+    #[doc = "VREF = AREF (VDD &gt;= VREF &gt;= AREFMIN)"]
+    #[inline(always)]
+    pub fn aref(self) -> &'a mut W {
+        self.variant(REFSEL_A::AREF)
+    }
+}
+impl R {
+    #[doc = "Bits 0:2 - Reference select"]
+    #[inline(always)]
+    pub fn refsel(&self) -> REFSEL_R {
+        REFSEL_R::new((self.bits & 7) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:2 - Reference select"]
+    #[inline(always)]
+    #[must_use]
+    pub fn refsel(&mut self) -> REFSEL_W<0> {
+        REFSEL_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Reference source select for single-ended mode\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [refsel](index.html) module"]
+pub struct REFSEL_SPEC;
+impl crate::RegisterSpec for REFSEL_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [refsel::R](R) reader structure"]
+impl crate::Readable for REFSEL_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [refsel::W](W) writer structure"]
+impl crate::Writable for REFSEL_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets REFSEL to value 0x04"]
+impl crate::Resettable for REFSEL_SPEC {
+    const RESET_VALUE: Self::Ux = 0x04;
+}

down-the-stack/dk_pac/src/comp/result.rs

@@ -0,0 +1,71 @@
+#[doc = "Register `RESULT` reader"]
+pub struct R(crate::R<RESULT_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<RESULT_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<RESULT_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<RESULT_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Field `RESULT` reader - Result of last compare. Decision point SAMPLE task."]
+pub type RESULT_R = crate::BitReader<RESULT_A>;
+#[doc = "Result of last compare. Decision point SAMPLE task.\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum RESULT_A {
+    #[doc = "0: Input voltage is below the threshold (VIN+ &lt; VIN-)"]
+    BELOW = 0,
+    #[doc = "1: Input voltage is above the threshold (VIN+ &gt; VIN-)"]
+    ABOVE = 1,
+}
+impl From<RESULT_A> for bool {
+    #[inline(always)]
+    fn from(variant: RESULT_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl RESULT_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> RESULT_A {
+        match self.bits {
+            false => RESULT_A::BELOW,
+            true => RESULT_A::ABOVE,
+        }
+    }
+    #[doc = "Checks if the value of the field is `BELOW`"]
+    #[inline(always)]
+    pub fn is_below(&self) -> bool {
+        *self == RESULT_A::BELOW
+    }
+    #[doc = "Checks if the value of the field is `ABOVE`"]
+    #[inline(always)]
+    pub fn is_above(&self) -> bool {
+        *self == RESULT_A::ABOVE
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Result of last compare. Decision point SAMPLE task."]
+    #[inline(always)]
+    pub fn result(&self) -> RESULT_R {
+        RESULT_R::new((self.bits & 1) != 0)
+    }
+}
+#[doc = "Compare result\n\nThis register you can [`read`](crate::generic::Reg::read). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [result](index.html) module"]
+pub struct RESULT_SPEC;
+impl crate::RegisterSpec for RESULT_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [result::R](R) reader structure"]
+impl crate::Readable for RESULT_SPEC {
+    type Reader = R;
+}
+#[doc = "`reset()` method sets RESULT to value 0"]
+impl crate::Resettable for RESULT_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/shorts.rs

@@ -0,0 +1,371 @@
+#[doc = "Register `SHORTS` reader"]
+pub struct R(crate::R<SHORTS_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<SHORTS_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<SHORTS_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `SHORTS` writer"]
+pub struct W(crate::W<SHORTS_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<SHORTS_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<SHORTS_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<SHORTS_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `READY_SAMPLE` reader - Shortcut between event READY and task SAMPLE"]
+pub type READY_SAMPLE_R = crate::BitReader<READY_SAMPLE_A>;
+#[doc = "Shortcut between event READY and task SAMPLE\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum READY_SAMPLE_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<READY_SAMPLE_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_SAMPLE_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_SAMPLE_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_SAMPLE_A {
+        match self.bits {
+            false => READY_SAMPLE_A::DISABLED,
+            true => READY_SAMPLE_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_SAMPLE_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_SAMPLE_A::ENABLED
+    }
+}
+#[doc = "Field `READY_SAMPLE` writer - Shortcut between event READY and task SAMPLE"]
+pub type READY_SAMPLE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, SHORTS_SPEC, READY_SAMPLE_A, O>;
+impl<'a, const O: u8> READY_SAMPLE_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(READY_SAMPLE_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(READY_SAMPLE_A::ENABLED)
+    }
+}
+#[doc = "Field `READY_STOP` reader - Shortcut between event READY and task STOP"]
+pub type READY_STOP_R = crate::BitReader<READY_STOP_A>;
+#[doc = "Shortcut between event READY and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum READY_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<READY_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: READY_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl READY_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> READY_STOP_A {
+        match self.bits {
+            false => READY_STOP_A::DISABLED,
+            true => READY_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == READY_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == READY_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `READY_STOP` writer - Shortcut between event READY and task STOP"]
+pub type READY_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, READY_STOP_A, O>;
+impl<'a, const O: u8> READY_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(READY_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(READY_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `DOWN_STOP` reader - Shortcut between event DOWN and task STOP"]
+pub type DOWN_STOP_R = crate::BitReader<DOWN_STOP_A>;
+#[doc = "Shortcut between event DOWN and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum DOWN_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<DOWN_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: DOWN_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl DOWN_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> DOWN_STOP_A {
+        match self.bits {
+            false => DOWN_STOP_A::DISABLED,
+            true => DOWN_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == DOWN_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == DOWN_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `DOWN_STOP` writer - Shortcut between event DOWN and task STOP"]
+pub type DOWN_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, DOWN_STOP_A, O>;
+impl<'a, const O: u8> DOWN_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(DOWN_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(DOWN_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `UP_STOP` reader - Shortcut between event UP and task STOP"]
+pub type UP_STOP_R = crate::BitReader<UP_STOP_A>;
+#[doc = "Shortcut between event UP and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum UP_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<UP_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: UP_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl UP_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> UP_STOP_A {
+        match self.bits {
+            false => UP_STOP_A::DISABLED,
+            true => UP_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == UP_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == UP_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `UP_STOP` writer - Shortcut between event UP and task STOP"]
+pub type UP_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, UP_STOP_A, O>;
+impl<'a, const O: u8> UP_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(UP_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(UP_STOP_A::ENABLED)
+    }
+}
+#[doc = "Field `CROSS_STOP` reader - Shortcut between event CROSS and task STOP"]
+pub type CROSS_STOP_R = crate::BitReader<CROSS_STOP_A>;
+#[doc = "Shortcut between event CROSS and task STOP\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum CROSS_STOP_A {
+    #[doc = "0: Disable shortcut"]
+    DISABLED = 0,
+    #[doc = "1: Enable shortcut"]
+    ENABLED = 1,
+}
+impl From<CROSS_STOP_A> for bool {
+    #[inline(always)]
+    fn from(variant: CROSS_STOP_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl CROSS_STOP_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> CROSS_STOP_A {
+        match self.bits {
+            false => CROSS_STOP_A::DISABLED,
+            true => CROSS_STOP_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == CROSS_STOP_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == CROSS_STOP_A::ENABLED
+    }
+}
+#[doc = "Field `CROSS_STOP` writer - Shortcut between event CROSS and task STOP"]
+pub type CROSS_STOP_W<'a, const O: u8> = crate::BitWriter<'a, u32, SHORTS_SPEC, CROSS_STOP_A, O>;
+impl<'a, const O: u8> CROSS_STOP_W<'a, O> {
+    #[doc = "Disable shortcut"]
+    #[inline(always)]
+    pub fn disabled(self) -> &'a mut W {
+        self.variant(CROSS_STOP_A::DISABLED)
+    }
+    #[doc = "Enable shortcut"]
+    #[inline(always)]
+    pub fn enabled(self) -> &'a mut W {
+        self.variant(CROSS_STOP_A::ENABLED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Shortcut between event READY and task SAMPLE"]
+    #[inline(always)]
+    pub fn ready_sample(&self) -> READY_SAMPLE_R {
+        READY_SAMPLE_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Shortcut between event READY and task STOP"]
+    #[inline(always)]
+    pub fn ready_stop(&self) -> READY_STOP_R {
+        READY_STOP_R::new(((self.bits >> 1) & 1) != 0)
+    }
+    #[doc = "Bit 2 - Shortcut between event DOWN and task STOP"]
+    #[inline(always)]
+    pub fn down_stop(&self) -> DOWN_STOP_R {
+        DOWN_STOP_R::new(((self.bits >> 2) & 1) != 0)
+    }
+    #[doc = "Bit 3 - Shortcut between event UP and task STOP"]
+    #[inline(always)]
+    pub fn up_stop(&self) -> UP_STOP_R {
+        UP_STOP_R::new(((self.bits >> 3) & 1) != 0)
+    }
+    #[doc = "Bit 4 - Shortcut between event CROSS and task STOP"]
+    #[inline(always)]
+    pub fn cross_stop(&self) -> CROSS_STOP_R {
+        CROSS_STOP_R::new(((self.bits >> 4) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Shortcut between event READY and task SAMPLE"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ready_sample(&mut self) -> READY_SAMPLE_W<0> {
+        READY_SAMPLE_W::new(self)
+    }
+    #[doc = "Bit 1 - Shortcut between event READY and task STOP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ready_stop(&mut self) -> READY_STOP_W<1> {
+        READY_STOP_W::new(self)
+    }
+    #[doc = "Bit 2 - Shortcut between event DOWN and task STOP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn down_stop(&mut self) -> DOWN_STOP_W<2> {
+        DOWN_STOP_W::new(self)
+    }
+    #[doc = "Bit 3 - Shortcut between event UP and task STOP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn up_stop(&mut self) -> UP_STOP_W<3> {
+        UP_STOP_W::new(self)
+    }
+    #[doc = "Bit 4 - Shortcut between event CROSS and task STOP"]
+    #[inline(always)]
+    #[must_use]
+    pub fn cross_stop(&mut self) -> CROSS_STOP_W<4> {
+        CROSS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Shortcuts between local events and tasks\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [shorts](index.html) module"]
+pub struct SHORTS_SPEC;
+impl crate::RegisterSpec for SHORTS_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [shorts::R](R) reader structure"]
+impl crate::Readable for SHORTS_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [shorts::W](W) writer structure"]
+impl crate::Writable for SHORTS_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets SHORTS to value 0"]
+impl crate::Resettable for SHORTS_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/tasks_sample.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_SAMPLE` writer"]
+pub struct W(crate::W<TASKS_SAMPLE_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_SAMPLE_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_SAMPLE_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_SAMPLE_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Sample comparator value\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_SAMPLE_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_SAMPLE_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_SAMPLE_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_SAMPLE` writer - Sample comparator value"]
+pub type TASKS_SAMPLE_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_SAMPLE_SPEC, TASKS_SAMPLE_AW, O>;
+impl<'a, const O: u8> TASKS_SAMPLE_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_SAMPLE_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Sample comparator value"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_sample(&mut self) -> TASKS_SAMPLE_W<0> {
+        TASKS_SAMPLE_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Sample comparator value\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_sample](index.html) module"]
+pub struct TASKS_SAMPLE_SPEC;
+impl crate::RegisterSpec for TASKS_SAMPLE_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_sample::W](W) writer structure"]
+impl crate::Writable for TASKS_SAMPLE_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_SAMPLE to value 0"]
+impl crate::Resettable for TASKS_SAMPLE_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/tasks_start.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_START` writer"]
+pub struct W(crate::W<TASKS_START_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_START_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_START_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_START_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start comparator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_START_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_START_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_START_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_START` writer - Start comparator"]
+pub type TASKS_START_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_START_SPEC, TASKS_START_AW, O>;
+impl<'a, const O: u8> TASKS_START_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_START_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start comparator"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_start(&mut self) -> TASKS_START_W<0> {
+        TASKS_START_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start comparator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_start](index.html) module"]
+pub struct TASKS_START_SPEC;
+impl crate::RegisterSpec for TASKS_START_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_start::W](W) writer structure"]
+impl crate::Writable for TASKS_START_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_START to value 0"]
+impl crate::Resettable for TASKS_START_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/tasks_stop.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOP` writer"]
+pub struct W(crate::W<TASKS_STOP_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOP_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOP_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOP_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Stop comparator\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_STOP_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOP_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOP_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOP` writer - Stop comparator"]
+pub type TASKS_STOP_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOP_SPEC, TASKS_STOP_AW, O>;
+impl<'a, const O: u8> TASKS_STOP_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOP_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Stop comparator"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_stop(&mut self) -> TASKS_STOP_W<0> {
+        TASKS_STOP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Stop comparator\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stop](index.html) module"]
+pub struct TASKS_STOP_SPEC;
+impl crate::RegisterSpec for TASKS_STOP_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stop::W](W) writer structure"]
+impl crate::Writable for TASKS_STOP_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_STOP to value 0"]
+impl crate::Resettable for TASKS_STOP_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/comp/th.rs

@@ -0,0 +1,95 @@
+#[doc = "Register `TH` reader"]
+pub struct R(crate::R<TH_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<TH_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<TH_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<TH_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `TH` writer"]
+pub struct W(crate::W<TH_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TH_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TH_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TH_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `THDOWN` reader - VDOWN = (THDOWN+1)/64*VREF"]
+pub type THDOWN_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `THDOWN` writer - VDOWN = (THDOWN+1)/64*VREF"]
+pub type THDOWN_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TH_SPEC, u8, u8, 6, O>;
+#[doc = "Field `THUP` reader - VUP = (THUP+1)/64*VREF"]
+pub type THUP_R = crate::FieldReader<u8, u8>;
+#[doc = "Field `THUP` writer - VUP = (THUP+1)/64*VREF"]
+pub type THUP_W<'a, const O: u8> = crate::FieldWriter<'a, u32, TH_SPEC, u8, u8, 6, O>;
+impl R {
+    #[doc = "Bits 0:5 - VDOWN = (THDOWN+1)/64*VREF"]
+    #[inline(always)]
+    pub fn thdown(&self) -> THDOWN_R {
+        THDOWN_R::new((self.bits & 0x3f) as u8)
+    }
+    #[doc = "Bits 8:13 - VUP = (THUP+1)/64*VREF"]
+    #[inline(always)]
+    pub fn thup(&self) -> THUP_R {
+        THUP_R::new(((self.bits >> 8) & 0x3f) as u8)
+    }
+}
+impl W {
+    #[doc = "Bits 0:5 - VDOWN = (THDOWN+1)/64*VREF"]
+    #[inline(always)]
+    #[must_use]
+    pub fn thdown(&mut self) -> THDOWN_W<0> {
+        THDOWN_W::new(self)
+    }
+    #[doc = "Bits 8:13 - VUP = (THUP+1)/64*VREF"]
+    #[inline(always)]
+    #[must_use]
+    pub fn thup(&mut self) -> THUP_W<8> {
+        THUP_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Threshold configuration for hysteresis unit\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [th](index.html) module"]
+pub struct TH_SPEC;
+impl crate::RegisterSpec for TH_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [th::R](R) reader structure"]
+impl crate::Readable for TH_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [th::W](W) writer structure"]
+impl crate::Writable for TH_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TH to value 0"]
+impl crate::Resettable for TH_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ecb.rs

@@ -0,0 +1,49 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00 - Start ECB block encrypt"]
+    pub tasks_startecb: TASKS_STARTECB,
+    #[doc = "0x04 - Abort a possible executing ECB operation"]
+    pub tasks_stopecb: TASKS_STOPECB,
+    _reserved2: [u8; 0xf8],
+    #[doc = "0x100 - ECB block encrypt complete"]
+    pub events_endecb: EVENTS_ENDECB,
+    #[doc = "0x104 - ECB block encrypt aborted because of a STOPECB task or due to an error"]
+    pub events_errorecb: EVENTS_ERRORECB,
+    _reserved4: [u8; 0x01fc],
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+    _reserved6: [u8; 0x01f8],
+    #[doc = "0x504 - ECB block encrypt memory pointers"]
+    pub ecbdataptr: ECBDATAPTR,
+}
+#[doc = "TASKS_STARTECB (w) register accessor: an alias for `Reg<TASKS_STARTECB_SPEC>`"]
+pub type TASKS_STARTECB = crate::Reg<tasks_startecb::TASKS_STARTECB_SPEC>;
+#[doc = "Start ECB block encrypt"]
+pub mod tasks_startecb;
+#[doc = "TASKS_STOPECB (w) register accessor: an alias for `Reg<TASKS_STOPECB_SPEC>`"]
+pub type TASKS_STOPECB = crate::Reg<tasks_stopecb::TASKS_STOPECB_SPEC>;
+#[doc = "Abort a possible executing ECB operation"]
+pub mod tasks_stopecb;
+#[doc = "EVENTS_ENDECB (rw) register accessor: an alias for `Reg<EVENTS_ENDECB_SPEC>`"]
+pub type EVENTS_ENDECB = crate::Reg<events_endecb::EVENTS_ENDECB_SPEC>;
+#[doc = "ECB block encrypt complete"]
+pub mod events_endecb;
+#[doc = "EVENTS_ERRORECB (rw) register accessor: an alias for `Reg<EVENTS_ERRORECB_SPEC>`"]
+pub type EVENTS_ERRORECB = crate::Reg<events_errorecb::EVENTS_ERRORECB_SPEC>;
+#[doc = "ECB block encrypt aborted because of a STOPECB task or due to an error"]
+pub mod events_errorecb;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;
+#[doc = "ECBDATAPTR (rw) register accessor: an alias for `Reg<ECBDATAPTR_SPEC>`"]
+pub type ECBDATAPTR = crate::Reg<ecbdataptr::ECBDATAPTR_SPEC>;
+#[doc = "ECB block encrypt memory pointers"]
+pub mod ecbdataptr;

down-the-stack/dk_pac/src/ecb/ecbdataptr.rs

@@ -0,0 +1,81 @@
+#[doc = "Register `ECBDATAPTR` reader"]
+pub struct R(crate::R<ECBDATAPTR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<ECBDATAPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<ECBDATAPTR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<ECBDATAPTR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `ECBDATAPTR` writer"]
+pub struct W(crate::W<ECBDATAPTR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<ECBDATAPTR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<ECBDATAPTR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<ECBDATAPTR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ECBDATAPTR` reader - Pointer to the ECB data structure (see Table 1 ECB data structure overview)"]
+pub type ECBDATAPTR_R = crate::FieldReader<u32, u32>;
+#[doc = "Field `ECBDATAPTR` writer - Pointer to the ECB data structure (see Table 1 ECB data structure overview)"]
+pub type ECBDATAPTR_W<'a, const O: u8> =
+    crate::FieldWriter<'a, u32, ECBDATAPTR_SPEC, u32, u32, 32, O>;
+impl R {
+    #[doc = "Bits 0:31 - Pointer to the ECB data structure (see Table 1 ECB data structure overview)"]
+    #[inline(always)]
+    pub fn ecbdataptr(&self) -> ECBDATAPTR_R {
+        ECBDATAPTR_R::new(self.bits)
+    }
+}
+impl W {
+    #[doc = "Bits 0:31 - Pointer to the ECB data structure (see Table 1 ECB data structure overview)"]
+    #[inline(always)]
+    #[must_use]
+    pub fn ecbdataptr(&mut self) -> ECBDATAPTR_W<0> {
+        ECBDATAPTR_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ECB block encrypt memory pointers\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ecbdataptr](index.html) module"]
+pub struct ECBDATAPTR_SPEC;
+impl crate::RegisterSpec for ECBDATAPTR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [ecbdataptr::R](R) reader structure"]
+impl crate::Readable for ECBDATAPTR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [ecbdataptr::W](W) writer structure"]
+impl crate::Writable for ECBDATAPTR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets ECBDATAPTR to value 0"]
+impl crate::Resettable for ECBDATAPTR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ecb/events_endecb.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ENDECB` reader"]
+pub struct R(crate::R<EVENTS_ENDECB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ENDECB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ENDECB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ENDECB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ENDECB` writer"]
+pub struct W(crate::W<EVENTS_ENDECB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ENDECB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ENDECB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ENDECB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ENDECB` reader - ECB block encrypt complete"]
+pub type EVENTS_ENDECB_R = crate::BitReader<EVENTS_ENDECB_A>;
+#[doc = "ECB block encrypt complete\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_ENDECB_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ENDECB_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ENDECB_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ENDECB_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ENDECB_A {
+        match self.bits {
+            false => EVENTS_ENDECB_A::NOT_GENERATED,
+            true => EVENTS_ENDECB_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ENDECB_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ENDECB_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ENDECB` writer - ECB block encrypt complete"]
+pub type EVENTS_ENDECB_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ENDECB_SPEC, EVENTS_ENDECB_A, O>;
+impl<'a, const O: u8> EVENTS_ENDECB_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDECB_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ENDECB_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - ECB block encrypt complete"]
+    #[inline(always)]
+    pub fn events_endecb(&self) -> EVENTS_ENDECB_R {
+        EVENTS_ENDECB_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - ECB block encrypt complete"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_endecb(&mut self) -> EVENTS_ENDECB_W<0> {
+        EVENTS_ENDECB_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ECB block encrypt complete\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_endecb](index.html) module"]
+pub struct EVENTS_ENDECB_SPEC;
+impl crate::RegisterSpec for EVENTS_ENDECB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_endecb::R](R) reader structure"]
+impl crate::Readable for EVENTS_ENDECB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_endecb::W](W) writer structure"]
+impl crate::Writable for EVENTS_ENDECB_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_ENDECB to value 0"]
+impl crate::Resettable for EVENTS_ENDECB_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ecb/events_errorecb.rs

@@ -0,0 +1,127 @@
+#[doc = "Register `EVENTS_ERRORECB` reader"]
+pub struct R(crate::R<EVENTS_ERRORECB_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_ERRORECB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_ERRORECB_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_ERRORECB_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_ERRORECB` writer"]
+pub struct W(crate::W<EVENTS_ERRORECB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_ERRORECB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_ERRORECB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_ERRORECB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_ERRORECB` reader - ECB block encrypt aborted because of a STOPECB task or due to an error"]
+pub type EVENTS_ERRORECB_R = crate::BitReader<EVENTS_ERRORECB_A>;
+#[doc = "ECB block encrypt aborted because of a STOPECB task or due to an error\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_ERRORECB_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_ERRORECB_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_ERRORECB_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_ERRORECB_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_ERRORECB_A {
+        match self.bits {
+            false => EVENTS_ERRORECB_A::NOT_GENERATED,
+            true => EVENTS_ERRORECB_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_ERRORECB_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_ERRORECB_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_ERRORECB` writer - ECB block encrypt aborted because of a STOPECB task or due to an error"]
+pub type EVENTS_ERRORECB_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_ERRORECB_SPEC, EVENTS_ERRORECB_A, O>;
+impl<'a, const O: u8> EVENTS_ERRORECB_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_ERRORECB_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_ERRORECB_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - ECB block encrypt aborted because of a STOPECB task or due to an error"]
+    #[inline(always)]
+    pub fn events_errorecb(&self) -> EVENTS_ERRORECB_R {
+        EVENTS_ERRORECB_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - ECB block encrypt aborted because of a STOPECB task or due to an error"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_errorecb(&mut self) -> EVENTS_ERRORECB_W<0> {
+        EVENTS_ERRORECB_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "ECB block encrypt aborted because of a STOPECB task or due to an error\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_errorecb](index.html) module"]
+pub struct EVENTS_ERRORECB_SPEC;
+impl crate::RegisterSpec for EVENTS_ERRORECB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_errorecb::R](R) reader structure"]
+impl crate::Readable for EVENTS_ERRORECB_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_errorecb::W](W) writer structure"]
+impl crate::Writable for EVENTS_ERRORECB_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_ERRORECB to value 0"]
+impl crate::Resettable for EVENTS_ERRORECB_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ecb/intenclr.rs

@@ -0,0 +1,201 @@
+#[doc = "Register `INTENCLR` reader"]
+pub struct R(crate::R<INTENCLR_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENCLR_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENCLR` writer"]
+pub struct W(crate::W<INTENCLR_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENCLR_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENCLR_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDECB` reader - Write '1' to disable interrupt for event ENDECB"]
+pub type ENDECB_R = crate::BitReader<ENDECB_A>;
+#[doc = "Write '1' to disable interrupt for event ENDECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDECB_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDECB_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDECB_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDECB_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDECB_A {
+        match self.bits {
+            false => ENDECB_A::DISABLED,
+            true => ENDECB_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDECB_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDECB_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ENDECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDECB_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ENDECB_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDECB_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDECB` writer - Write '1' to disable interrupt for event ENDECB"]
+pub type ENDECB_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ENDECB_AW, O>;
+impl<'a, const O: u8> ENDECB_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ENDECB_AW::CLEAR)
+    }
+}
+#[doc = "Field `ERRORECB` reader - Write '1' to disable interrupt for event ERRORECB"]
+pub type ERRORECB_R = crate::BitReader<ERRORECB_A>;
+#[doc = "Write '1' to disable interrupt for event ERRORECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERRORECB_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ERRORECB_A> for bool {
+    #[inline(always)]
+    fn from(variant: ERRORECB_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ERRORECB_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ERRORECB_A {
+        match self.bits {
+            false => ERRORECB_A::DISABLED,
+            true => ERRORECB_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ERRORECB_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ERRORECB_A::ENABLED
+    }
+}
+#[doc = "Write '1' to disable interrupt for event ERRORECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERRORECB_AW {
+    #[doc = "1: Disable"]
+    CLEAR = 1,
+}
+impl From<ERRORECB_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ERRORECB_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ERRORECB` writer - Write '1' to disable interrupt for event ERRORECB"]
+pub type ERRORECB_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, ERRORECB_AW, O>;
+impl<'a, const O: u8> ERRORECB_W<'a, O> {
+    #[doc = "Disable"]
+    #[inline(always)]
+    pub fn clear(self) -> &'a mut W {
+        self.variant(ERRORECB_AW::CLEAR)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event ENDECB"]
+    #[inline(always)]
+    pub fn endecb(&self) -> ENDECB_R {
+        ENDECB_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event ERRORECB"]
+    #[inline(always)]
+    pub fn errorecb(&self) -> ERRORECB_R {
+        ERRORECB_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to disable interrupt for event ENDECB"]
+    #[inline(always)]
+    #[must_use]
+    pub fn endecb(&mut self) -> ENDECB_W<0> {
+        ENDECB_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to disable interrupt for event ERRORECB"]
+    #[inline(always)]
+    #[must_use]
+    pub fn errorecb(&mut self) -> ERRORECB_W<1> {
+        ERRORECB_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
+pub struct INTENCLR_SPEC;
+impl crate::RegisterSpec for INTENCLR_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
+impl crate::Readable for INTENCLR_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
+impl crate::Writable for INTENCLR_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENCLR to value 0"]
+impl crate::Resettable for INTENCLR_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ecb/intenset.rs

@@ -0,0 +1,201 @@
+#[doc = "Register `INTENSET` reader"]
+pub struct R(crate::R<INTENSET_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<INTENSET_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `INTENSET` writer"]
+pub struct W(crate::W<INTENSET_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<INTENSET_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<INTENSET_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `ENDECB` reader - Write '1' to enable interrupt for event ENDECB"]
+pub type ENDECB_R = crate::BitReader<ENDECB_A>;
+#[doc = "Write '1' to enable interrupt for event ENDECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDECB_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ENDECB_A> for bool {
+    #[inline(always)]
+    fn from(variant: ENDECB_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ENDECB_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ENDECB_A {
+        match self.bits {
+            false => ENDECB_A::DISABLED,
+            true => ENDECB_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ENDECB_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ENDECB_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ENDECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ENDECB_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ENDECB_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ENDECB_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ENDECB` writer - Write '1' to enable interrupt for event ENDECB"]
+pub type ENDECB_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDECB_AW, O>;
+impl<'a, const O: u8> ENDECB_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ENDECB_AW::SET)
+    }
+}
+#[doc = "Field `ERRORECB` reader - Write '1' to enable interrupt for event ERRORECB"]
+pub type ERRORECB_R = crate::BitReader<ERRORECB_A>;
+#[doc = "Write '1' to enable interrupt for event ERRORECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERRORECB_A {
+    #[doc = "0: Read: Disabled"]
+    DISABLED = 0,
+    #[doc = "1: Read: Enabled"]
+    ENABLED = 1,
+}
+impl From<ERRORECB_A> for bool {
+    #[inline(always)]
+    fn from(variant: ERRORECB_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl ERRORECB_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> ERRORECB_A {
+        match self.bits {
+            false => ERRORECB_A::DISABLED,
+            true => ERRORECB_A::ENABLED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `DISABLED`"]
+    #[inline(always)]
+    pub fn is_disabled(&self) -> bool {
+        *self == ERRORECB_A::DISABLED
+    }
+    #[doc = "Checks if the value of the field is `ENABLED`"]
+    #[inline(always)]
+    pub fn is_enabled(&self) -> bool {
+        *self == ERRORECB_A::ENABLED
+    }
+}
+#[doc = "Write '1' to enable interrupt for event ERRORECB\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum ERRORECB_AW {
+    #[doc = "1: Enable"]
+    SET = 1,
+}
+impl From<ERRORECB_AW> for bool {
+    #[inline(always)]
+    fn from(variant: ERRORECB_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `ERRORECB` writer - Write '1' to enable interrupt for event ERRORECB"]
+pub type ERRORECB_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ERRORECB_AW, O>;
+impl<'a, const O: u8> ERRORECB_W<'a, O> {
+    #[doc = "Enable"]
+    #[inline(always)]
+    pub fn set(self) -> &'a mut W {
+        self.variant(ERRORECB_AW::SET)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event ENDECB"]
+    #[inline(always)]
+    pub fn endecb(&self) -> ENDECB_R {
+        ENDECB_R::new((self.bits & 1) != 0)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event ERRORECB"]
+    #[inline(always)]
+    pub fn errorecb(&self) -> ERRORECB_R {
+        ERRORECB_R::new(((self.bits >> 1) & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Write '1' to enable interrupt for event ENDECB"]
+    #[inline(always)]
+    #[must_use]
+    pub fn endecb(&mut self) -> ENDECB_W<0> {
+        ENDECB_W::new(self)
+    }
+    #[doc = "Bit 1 - Write '1' to enable interrupt for event ERRORECB"]
+    #[inline(always)]
+    #[must_use]
+    pub fn errorecb(&mut self) -> ERRORECB_W<1> {
+        ERRORECB_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
+pub struct INTENSET_SPEC;
+impl crate::RegisterSpec for INTENSET_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [intenset::R](R) reader structure"]
+impl crate::Readable for INTENSET_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
+impl crate::Writable for INTENSET_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets INTENSET to value 0"]
+impl crate::Resettable for INTENSET_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ecb/tasks_startecb.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STARTECB` writer"]
+pub struct W(crate::W<TASKS_STARTECB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STARTECB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STARTECB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STARTECB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Start ECB block encrypt\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_STARTECB_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STARTECB_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STARTECB_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STARTECB` writer - Start ECB block encrypt"]
+pub type TASKS_STARTECB_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STARTECB_SPEC, TASKS_STARTECB_AW, O>;
+impl<'a, const O: u8> TASKS_STARTECB_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STARTECB_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Start ECB block encrypt"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_startecb(&mut self) -> TASKS_STARTECB_W<0> {
+        TASKS_STARTECB_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Start ECB block encrypt\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_startecb](index.html) module"]
+pub struct TASKS_STARTECB_SPEC;
+impl crate::RegisterSpec for TASKS_STARTECB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_startecb::W](W) writer structure"]
+impl crate::Writable for TASKS_STARTECB_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_STARTECB to value 0"]
+impl crate::Resettable for TASKS_STARTECB_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ecb/tasks_stopecb.rs

@@ -0,0 +1,72 @@
+#[doc = "Register `TASKS_STOPECB` writer"]
+pub struct W(crate::W<TASKS_STOPECB_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_STOPECB_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_STOPECB_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_STOPECB_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Abort a possible executing ECB operation\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_STOPECB_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_STOPECB_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_STOPECB_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_STOPECB` writer - Abort a possible executing ECB operation"]
+pub type TASKS_STOPECB_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_STOPECB_SPEC, TASKS_STOPECB_AW, O>;
+impl<'a, const O: u8> TASKS_STOPECB_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_STOPECB_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Abort a possible executing ECB operation"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_stopecb(&mut self) -> TASKS_STOPECB_W<0> {
+        TASKS_STOPECB_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Abort a possible executing ECB operation\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_stopecb](index.html) module"]
+pub struct TASKS_STOPECB_SPEC;
+impl crate::RegisterSpec for TASKS_STOPECB_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_stopecb::W](W) writer structure"]
+impl crate::Writable for TASKS_STOPECB_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_STOPECB to value 0"]
+impl crate::Resettable for TASKS_STOPECB_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/egu0.rs

@@ -0,0 +1,40 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    #[doc = "0x00..0x40 - Description collection: Trigger n for triggering the corresponding TRIGGERED\\[n\\]
+event"]
+    pub tasks_trigger: [TASKS_TRIGGER; 16],
+    _reserved1: [u8; 0xc0],
+    #[doc = "0x100..0x140 - Description collection: Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task"]
+    pub events_triggered: [EVENTS_TRIGGERED; 16],
+    _reserved2: [u8; 0x01c0],
+    #[doc = "0x300 - Enable or disable interrupt"]
+    pub inten: INTEN,
+    #[doc = "0x304 - Enable interrupt"]
+    pub intenset: INTENSET,
+    #[doc = "0x308 - Disable interrupt"]
+    pub intenclr: INTENCLR,
+}
+#[doc = "TASKS_TRIGGER (w) register accessor: an alias for `Reg<TASKS_TRIGGER_SPEC>`"]
+pub type TASKS_TRIGGER = crate::Reg<tasks_trigger::TASKS_TRIGGER_SPEC>;
+#[doc = "Description collection: Trigger n for triggering the corresponding TRIGGERED\\[n\\]
+event"]
+pub mod tasks_trigger;
+#[doc = "EVENTS_TRIGGERED (rw) register accessor: an alias for `Reg<EVENTS_TRIGGERED_SPEC>`"]
+pub type EVENTS_TRIGGERED = crate::Reg<events_triggered::EVENTS_TRIGGERED_SPEC>;
+#[doc = "Description collection: Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task"]
+pub mod events_triggered;
+#[doc = "INTEN (rw) register accessor: an alias for `Reg<INTEN_SPEC>`"]
+pub type INTEN = crate::Reg<inten::INTEN_SPEC>;
+#[doc = "Enable or disable interrupt"]
+pub mod inten;
+#[doc = "INTENSET (rw) register accessor: an alias for `Reg<INTENSET_SPEC>`"]
+pub type INTENSET = crate::Reg<intenset::INTENSET_SPEC>;
+#[doc = "Enable interrupt"]
+pub mod intenset;
+#[doc = "INTENCLR (rw) register accessor: an alias for `Reg<INTENCLR_SPEC>`"]
+pub type INTENCLR = crate::Reg<intenclr::INTENCLR_SPEC>;
+#[doc = "Disable interrupt"]
+pub mod intenclr;

down-the-stack/dk_pac/src/egu0/events_triggered.rs

@@ -0,0 +1,134 @@
+#[doc = "Register `EVENTS_TRIGGERED[%s]` reader"]
+pub struct R(crate::R<EVENTS_TRIGGERED_SPEC>);
+impl core::ops::Deref for R {
+    type Target = crate::R<EVENTS_TRIGGERED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl From<crate::R<EVENTS_TRIGGERED_SPEC>> for R {
+    #[inline(always)]
+    fn from(reader: crate::R<EVENTS_TRIGGERED_SPEC>) -> Self {
+        R(reader)
+    }
+}
+#[doc = "Register `EVENTS_TRIGGERED[%s]` writer"]
+pub struct W(crate::W<EVENTS_TRIGGERED_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<EVENTS_TRIGGERED_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<EVENTS_TRIGGERED_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<EVENTS_TRIGGERED_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Field `EVENTS_TRIGGERED` reader - Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task"]
+pub type EVENTS_TRIGGERED_R = crate::BitReader<EVENTS_TRIGGERED_A>;
+#[doc = "Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum EVENTS_TRIGGERED_A {
+    #[doc = "0: Event not generated"]
+    NOT_GENERATED = 0,
+    #[doc = "1: Event generated"]
+    GENERATED = 1,
+}
+impl From<EVENTS_TRIGGERED_A> for bool {
+    #[inline(always)]
+    fn from(variant: EVENTS_TRIGGERED_A) -> Self {
+        variant as u8 != 0
+    }
+}
+impl EVENTS_TRIGGERED_R {
+    #[doc = "Get enumerated values variant"]
+    #[inline(always)]
+    pub fn variant(&self) -> EVENTS_TRIGGERED_A {
+        match self.bits {
+            false => EVENTS_TRIGGERED_A::NOT_GENERATED,
+            true => EVENTS_TRIGGERED_A::GENERATED,
+        }
+    }
+    #[doc = "Checks if the value of the field is `NOT_GENERATED`"]
+    #[inline(always)]
+    pub fn is_not_generated(&self) -> bool {
+        *self == EVENTS_TRIGGERED_A::NOT_GENERATED
+    }
+    #[doc = "Checks if the value of the field is `GENERATED`"]
+    #[inline(always)]
+    pub fn is_generated(&self) -> bool {
+        *self == EVENTS_TRIGGERED_A::GENERATED
+    }
+}
+#[doc = "Field `EVENTS_TRIGGERED` writer - Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task"]
+pub type EVENTS_TRIGGERED_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, EVENTS_TRIGGERED_SPEC, EVENTS_TRIGGERED_A, O>;
+impl<'a, const O: u8> EVENTS_TRIGGERED_W<'a, O> {
+    #[doc = "Event not generated"]
+    #[inline(always)]
+    pub fn not_generated(self) -> &'a mut W {
+        self.variant(EVENTS_TRIGGERED_A::NOT_GENERATED)
+    }
+    #[doc = "Event generated"]
+    #[inline(always)]
+    pub fn generated(self) -> &'a mut W {
+        self.variant(EVENTS_TRIGGERED_A::GENERATED)
+    }
+}
+impl R {
+    #[doc = "Bit 0 - Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task"]
+    #[inline(always)]
+    pub fn events_triggered(&self) -> EVENTS_TRIGGERED_R {
+        EVENTS_TRIGGERED_R::new((self.bits & 1) != 0)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task"]
+    #[inline(always)]
+    #[must_use]
+    pub fn events_triggered(&mut self) -> EVENTS_TRIGGERED_W<0> {
+        EVENTS_TRIGGERED_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Event number n generated by triggering the corresponding TRIGGER\\[n\\]
+task\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [events_triggered](index.html) module"]
+pub struct EVENTS_TRIGGERED_SPEC;
+impl crate::RegisterSpec for EVENTS_TRIGGERED_SPEC {
+    type Ux = u32;
+}
+#[doc = "`read()` method returns [events_triggered::R](R) reader structure"]
+impl crate::Readable for EVENTS_TRIGGERED_SPEC {
+    type Reader = R;
+}
+#[doc = "`write(|w| ..)` method takes [events_triggered::W](W) writer structure"]
+impl crate::Writable for EVENTS_TRIGGERED_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets EVENTS_TRIGGERED[%s]
+to value 0"]
+impl crate::Resettable for EVENTS_TRIGGERED_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/egu0/tasks_trigger.rs

@@ -0,0 +1,77 @@
+#[doc = "Register `TASKS_TRIGGER[%s]` writer"]
+pub struct W(crate::W<TASKS_TRIGGER_SPEC>);
+impl core::ops::Deref for W {
+    type Target = crate::W<TASKS_TRIGGER_SPEC>;
+    #[inline(always)]
+    fn deref(&self) -> &Self::Target {
+        &self.0
+    }
+}
+impl core::ops::DerefMut for W {
+    #[inline(always)]
+    fn deref_mut(&mut self) -> &mut Self::Target {
+        &mut self.0
+    }
+}
+impl From<crate::W<TASKS_TRIGGER_SPEC>> for W {
+    #[inline(always)]
+    fn from(writer: crate::W<TASKS_TRIGGER_SPEC>) -> Self {
+        W(writer)
+    }
+}
+#[doc = "Trigger n for triggering the corresponding TRIGGERED\\[n\\]
+event\n\nValue on reset: 0"]
+#[derive(Clone, Copy, Debug, PartialEq, Eq)]
+pub enum TASKS_TRIGGER_AW {
+    #[doc = "1: Trigger task"]
+    TRIGGER = 1,
+}
+impl From<TASKS_TRIGGER_AW> for bool {
+    #[inline(always)]
+    fn from(variant: TASKS_TRIGGER_AW) -> Self {
+        variant as u8 != 0
+    }
+}
+#[doc = "Field `TASKS_TRIGGER` writer - Trigger n for triggering the corresponding TRIGGERED\\[n\\]
+event"]
+pub type TASKS_TRIGGER_W<'a, const O: u8> =
+    crate::BitWriter<'a, u32, TASKS_TRIGGER_SPEC, TASKS_TRIGGER_AW, O>;
+impl<'a, const O: u8> TASKS_TRIGGER_W<'a, O> {
+    #[doc = "Trigger task"]
+    #[inline(always)]
+    pub fn trigger(self) -> &'a mut W {
+        self.variant(TASKS_TRIGGER_AW::TRIGGER)
+    }
+}
+impl W {
+    #[doc = "Bit 0 - Trigger n for triggering the corresponding TRIGGERED\\[n\\]
+event"]
+    #[inline(always)]
+    #[must_use]
+    pub fn tasks_trigger(&mut self) -> TASKS_TRIGGER_W<0> {
+        TASKS_TRIGGER_W::new(self)
+    }
+    #[doc = "Writes raw bits to the register."]
+    #[inline(always)]
+    pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
+        self.0.bits(bits);
+        self
+    }
+}
+#[doc = "Description collection: Trigger n for triggering the corresponding TRIGGERED\\[n\\]
+event\n\nThis register you can [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [tasks_trigger](index.html) module"]
+pub struct TASKS_TRIGGER_SPEC;
+impl crate::RegisterSpec for TASKS_TRIGGER_SPEC {
+    type Ux = u32;
+}
+#[doc = "`write(|w| ..)` method takes [tasks_trigger::W](W) writer structure"]
+impl crate::Writable for TASKS_TRIGGER_SPEC {
+    type Writer = W;
+    const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+    const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
+}
+#[doc = "`reset()` method sets TASKS_TRIGGER[%s]
+to value 0"]
+impl crate::Resettable for TASKS_TRIGGER_SPEC {
+    const RESET_VALUE: Self::Ux = 0;
+}

down-the-stack/dk_pac/src/ficr.rs

@@ -0,0 +1,73 @@
+#[doc = r"Register block"]
+#[repr(C)]
+pub struct RegisterBlock {
+    _reserved0: [u8; 0x10],
+    #[doc = "0x10 - Code memory page size"]
+    pub codepagesize: CODEPAGESIZE,
+    #[doc = "0x14 - Code memory size"]
+    pub codesize: CODESIZE,
+    _reserved2: [u8; 0x48],
+    #[doc = "0x60..0x68 - Description collection: Device identifier"]
+    pub deviceid: [DEVICEID; 2],
+    _reserved3: [u8; 0x18],
+    #[doc = "0x80..0x90 - Description collection: Encryption Root, word n"]
+    pub er: [ER; 4],
+    #[doc = "0x90..0xa0 - Description collection: Identity Root, word n"]
+    pub ir: [IR; 4],
+    #[doc = "0xa0 - Device address type"]
+    pub deviceaddrtype: DEVICEADDRTYPE,
+    #[doc = "0xa4..0xac - Description collection: Device address n"]
+    pub deviceaddr: [DEVICEADDR; 2],
+    _reserved7: [u8; 0x54],
+    #[doc = "0x100..0x114 - Device info"]
+    pub info: INFO,
+    _reserved8: [u8; 0x02f0],
+    #[doc = "0x404..0x448 - Registers storing factory TEMP module linearization coefficients"]
+    pub temp: TEMP,
+    _reserved9: [u8; 0x08],
+    #[doc = "0x450..0x460 - Unspecified"]
+    pub nfc: NFC,
+}
+#[doc = "CODEPAGESIZE (r) register accessor: an alias for `Reg<CODEPAGESIZE_SPEC>`"]
+pub type CODEPAGESIZE = crate::Reg<codepagesize::CODEPAGESIZE_SPEC>;
+#[doc = "Code memory page size"]
+pub mod codepagesize;
+#[doc = "CODESIZE (r) register accessor: an alias for `Reg<CODESIZE_SPEC>`"]
+pub type CODESIZE = crate::Reg<codesize::CODESIZE_SPEC>;
+#[doc = "Code memory size"]
+pub mod codesize;
+#[doc = "DEVICEID (r) register accessor: an alias for `Reg<DEVICEID_SPEC>`"]
+pub type DEVICEID = crate::Reg<deviceid::DEVICEID_SPEC>;
+#[doc = "Description collection: Device identifier"]
+pub mod deviceid;
+#[doc = "ER (r) register accessor: an alias for `Reg<ER_SPEC>`"]
+pub type ER = crate::Reg<er::ER_SPEC>;
+#[doc = "Description collection: Encryption Root, word n"]
+pub mod er;
+#[doc = "IR (r) register accessor: an alias for `Reg<IR_SPEC>`"]
+pub type IR = crate::Reg<ir::IR_SPEC>;
+#[doc = "Description collection: Identity Root, word n"]
+pub mod ir;
+#[doc = "DEVICEADDRTYPE (r) register accessor: an alias for `Reg<DEVICEADDRTYPE_SPEC>`"]
+pub type DEVICEADDRTYPE = crate::Reg<deviceaddrtype::DEVICEADDRTYPE_SPEC>;
+#[doc = "Device address type"]
+pub mod deviceaddrtype;
+#[doc = "DEVICEADDR (r) register accessor: an alias for `Reg<DEVICEADDR_SPEC>`"]
+pub type DEVICEADDR = crate::Reg<deviceaddr::DEVICEADDR_SPEC>;
+#[doc = "Description collection: Device address n"]
+pub mod deviceaddr;
+#[doc = "Device info"]
+pub use self::info::INFO;
+#[doc = r"Cluster"]
+#[doc = "Device info"]
+pub mod info;
+#[doc = "Registers storing factory TEMP module linearization coefficients"]
+pub use self::temp::TEMP;
+#[doc = r"Cluster"]
+#[doc = "Registers storing factory TEMP module linearization coefficients"]
+pub mod temp;
+#[doc = "Unspecified"]
+pub use self::nfc::NFC;
+#[doc = r"Cluster"]
+#[doc = "Unspecified"]
+pub mod nfc;