mirror of
https://github.com/ferrous-systems/embedded-trainings-2020.git
synced 2024-05-18 16:28:22 +00:00
202 lines
6.2 KiB
Rust
202 lines
6.2 KiB
Rust
#[doc = "Register `INTENSET` reader"]
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pub struct R(crate::R<INTENSET_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<INTENSET_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<INTENSET_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<INTENSET_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `INTENSET` writer"]
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pub struct W(crate::W<INTENSET_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<INTENSET_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<INTENSET_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<INTENSET_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `ENDECB` reader - Write '1' to enable interrupt for event ENDECB"]
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pub type ENDECB_R = crate::BitReader<ENDECB_A>;
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#[doc = "Write '1' to enable interrupt for event ENDECB\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum ENDECB_A {
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#[doc = "0: Read: Disabled"]
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DISABLED = 0,
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#[doc = "1: Read: Enabled"]
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ENABLED = 1,
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}
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impl From<ENDECB_A> for bool {
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#[inline(always)]
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fn from(variant: ENDECB_A) -> Self {
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variant as u8 != 0
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}
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}
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impl ENDECB_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> ENDECB_A {
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match self.bits {
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false => ENDECB_A::DISABLED,
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true => ENDECB_A::ENABLED,
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}
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}
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#[doc = "Checks if the value of the field is `DISABLED`"]
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#[inline(always)]
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pub fn is_disabled(&self) -> bool {
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*self == ENDECB_A::DISABLED
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}
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#[doc = "Checks if the value of the field is `ENABLED`"]
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#[inline(always)]
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pub fn is_enabled(&self) -> bool {
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*self == ENDECB_A::ENABLED
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}
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}
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#[doc = "Write '1' to enable interrupt for event ENDECB\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum ENDECB_AW {
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#[doc = "1: Enable"]
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SET = 1,
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}
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impl From<ENDECB_AW> for bool {
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#[inline(always)]
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fn from(variant: ENDECB_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `ENDECB` writer - Write '1' to enable interrupt for event ENDECB"]
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pub type ENDECB_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ENDECB_AW, O>;
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impl<'a, const O: u8> ENDECB_W<'a, O> {
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#[doc = "Enable"]
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#[inline(always)]
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pub fn set(self) -> &'a mut W {
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self.variant(ENDECB_AW::SET)
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}
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}
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#[doc = "Field `ERRORECB` reader - Write '1' to enable interrupt for event ERRORECB"]
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pub type ERRORECB_R = crate::BitReader<ERRORECB_A>;
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#[doc = "Write '1' to enable interrupt for event ERRORECB\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum ERRORECB_A {
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#[doc = "0: Read: Disabled"]
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DISABLED = 0,
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#[doc = "1: Read: Enabled"]
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ENABLED = 1,
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}
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impl From<ERRORECB_A> for bool {
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#[inline(always)]
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fn from(variant: ERRORECB_A) -> Self {
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variant as u8 != 0
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}
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}
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impl ERRORECB_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> ERRORECB_A {
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match self.bits {
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false => ERRORECB_A::DISABLED,
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true => ERRORECB_A::ENABLED,
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}
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}
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#[doc = "Checks if the value of the field is `DISABLED`"]
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#[inline(always)]
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pub fn is_disabled(&self) -> bool {
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*self == ERRORECB_A::DISABLED
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}
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#[doc = "Checks if the value of the field is `ENABLED`"]
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#[inline(always)]
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pub fn is_enabled(&self) -> bool {
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*self == ERRORECB_A::ENABLED
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}
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}
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#[doc = "Write '1' to enable interrupt for event ERRORECB\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum ERRORECB_AW {
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#[doc = "1: Enable"]
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SET = 1,
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}
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impl From<ERRORECB_AW> for bool {
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#[inline(always)]
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fn from(variant: ERRORECB_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `ERRORECB` writer - Write '1' to enable interrupt for event ERRORECB"]
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pub type ERRORECB_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENSET_SPEC, ERRORECB_AW, O>;
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impl<'a, const O: u8> ERRORECB_W<'a, O> {
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#[doc = "Enable"]
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#[inline(always)]
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pub fn set(self) -> &'a mut W {
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self.variant(ERRORECB_AW::SET)
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}
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}
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impl R {
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#[doc = "Bit 0 - Write '1' to enable interrupt for event ENDECB"]
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#[inline(always)]
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pub fn endecb(&self) -> ENDECB_R {
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ENDECB_R::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1 - Write '1' to enable interrupt for event ERRORECB"]
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#[inline(always)]
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pub fn errorecb(&self) -> ERRORECB_R {
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ERRORECB_R::new(((self.bits >> 1) & 1) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - Write '1' to enable interrupt for event ENDECB"]
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#[inline(always)]
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#[must_use]
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pub fn endecb(&mut self) -> ENDECB_W<0> {
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ENDECB_W::new(self)
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}
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#[doc = "Bit 1 - Write '1' to enable interrupt for event ERRORECB"]
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#[inline(always)]
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#[must_use]
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pub fn errorecb(&mut self) -> ERRORECB_W<1> {
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ERRORECB_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Enable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenset](index.html) module"]
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pub struct INTENSET_SPEC;
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impl crate::RegisterSpec for INTENSET_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [intenset::R](R) reader structure"]
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impl crate::Readable for INTENSET_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [intenset::W](W) writer structure"]
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impl crate::Writable for INTENSET_SPEC {
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type Writer = W;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
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}
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#[doc = "`reset()` method sets INTENSET to value 0"]
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impl crate::Resettable for INTENSET_SPEC {
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const RESET_VALUE: Self::Ux = 0;
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}
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