mirror of
https://github.com/ferrous-systems/embedded-trainings-2020.git
synced 2024-05-18 16:28:22 +00:00
271 lines
8.4 KiB
Rust
271 lines
8.4 KiB
Rust
#[doc = "Register `INTENCLR` reader"]
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pub struct R(crate::R<INTENCLR_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<INTENCLR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<INTENCLR_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<INTENCLR_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `INTENCLR` writer"]
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pub struct W(crate::W<INTENCLR_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<INTENCLR_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<INTENCLR_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<INTENCLR_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `END` reader - Write '1' to disable interrupt for event END"]
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pub type END_R = crate::BitReader<END_A>;
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#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum END_A {
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#[doc = "0: Read: Disabled"]
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DISABLED = 0,
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#[doc = "1: Read: Enabled"]
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ENABLED = 1,
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}
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impl From<END_A> for bool {
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#[inline(always)]
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fn from(variant: END_A) -> Self {
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variant as u8 != 0
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}
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}
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impl END_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> END_A {
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match self.bits {
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false => END_A::DISABLED,
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true => END_A::ENABLED,
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}
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}
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#[doc = "Checks if the value of the field is `DISABLED`"]
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#[inline(always)]
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pub fn is_disabled(&self) -> bool {
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*self == END_A::DISABLED
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}
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#[doc = "Checks if the value of the field is `ENABLED`"]
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#[inline(always)]
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pub fn is_enabled(&self) -> bool {
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*self == END_A::ENABLED
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}
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}
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#[doc = "Write '1' to disable interrupt for event END\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum END_AW {
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#[doc = "1: Disable"]
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CLEAR = 1,
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}
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impl From<END_AW> for bool {
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#[inline(always)]
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fn from(variant: END_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `END` writer - Write '1' to disable interrupt for event END"]
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pub type END_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, END_AW, O>;
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impl<'a, const O: u8> END_W<'a, O> {
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#[doc = "Disable"]
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#[inline(always)]
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pub fn clear(self) -> &'a mut W {
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self.variant(END_AW::CLEAR)
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}
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}
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#[doc = "Field `RESOLVED` reader - Write '1' to disable interrupt for event RESOLVED"]
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pub type RESOLVED_R = crate::BitReader<RESOLVED_A>;
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#[doc = "Write '1' to disable interrupt for event RESOLVED\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum RESOLVED_A {
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#[doc = "0: Read: Disabled"]
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DISABLED = 0,
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#[doc = "1: Read: Enabled"]
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ENABLED = 1,
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}
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impl From<RESOLVED_A> for bool {
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#[inline(always)]
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fn from(variant: RESOLVED_A) -> Self {
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variant as u8 != 0
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}
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}
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impl RESOLVED_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> RESOLVED_A {
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match self.bits {
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false => RESOLVED_A::DISABLED,
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true => RESOLVED_A::ENABLED,
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}
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}
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#[doc = "Checks if the value of the field is `DISABLED`"]
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#[inline(always)]
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pub fn is_disabled(&self) -> bool {
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*self == RESOLVED_A::DISABLED
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}
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#[doc = "Checks if the value of the field is `ENABLED`"]
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#[inline(always)]
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pub fn is_enabled(&self) -> bool {
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*self == RESOLVED_A::ENABLED
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}
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}
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#[doc = "Write '1' to disable interrupt for event RESOLVED\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum RESOLVED_AW {
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#[doc = "1: Disable"]
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CLEAR = 1,
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}
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impl From<RESOLVED_AW> for bool {
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#[inline(always)]
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fn from(variant: RESOLVED_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `RESOLVED` writer - Write '1' to disable interrupt for event RESOLVED"]
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pub type RESOLVED_W<'a, const O: u8> = crate::BitWriter<'a, u32, INTENCLR_SPEC, RESOLVED_AW, O>;
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impl<'a, const O: u8> RESOLVED_W<'a, O> {
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#[doc = "Disable"]
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#[inline(always)]
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pub fn clear(self) -> &'a mut W {
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self.variant(RESOLVED_AW::CLEAR)
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}
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}
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#[doc = "Field `NOTRESOLVED` reader - Write '1' to disable interrupt for event NOTRESOLVED"]
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pub type NOTRESOLVED_R = crate::BitReader<NOTRESOLVED_A>;
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#[doc = "Write '1' to disable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum NOTRESOLVED_A {
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#[doc = "0: Read: Disabled"]
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DISABLED = 0,
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#[doc = "1: Read: Enabled"]
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ENABLED = 1,
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}
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impl From<NOTRESOLVED_A> for bool {
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#[inline(always)]
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fn from(variant: NOTRESOLVED_A) -> Self {
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variant as u8 != 0
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}
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}
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impl NOTRESOLVED_R {
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#[doc = "Get enumerated values variant"]
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#[inline(always)]
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pub fn variant(&self) -> NOTRESOLVED_A {
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match self.bits {
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false => NOTRESOLVED_A::DISABLED,
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true => NOTRESOLVED_A::ENABLED,
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}
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}
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#[doc = "Checks if the value of the field is `DISABLED`"]
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#[inline(always)]
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pub fn is_disabled(&self) -> bool {
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*self == NOTRESOLVED_A::DISABLED
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}
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#[doc = "Checks if the value of the field is `ENABLED`"]
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#[inline(always)]
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pub fn is_enabled(&self) -> bool {
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*self == NOTRESOLVED_A::ENABLED
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}
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}
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#[doc = "Write '1' to disable interrupt for event NOTRESOLVED\n\nValue on reset: 0"]
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#[derive(Clone, Copy, Debug, PartialEq, Eq)]
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pub enum NOTRESOLVED_AW {
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#[doc = "1: Disable"]
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CLEAR = 1,
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}
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impl From<NOTRESOLVED_AW> for bool {
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#[inline(always)]
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fn from(variant: NOTRESOLVED_AW) -> Self {
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variant as u8 != 0
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}
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}
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#[doc = "Field `NOTRESOLVED` writer - Write '1' to disable interrupt for event NOTRESOLVED"]
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pub type NOTRESOLVED_W<'a, const O: u8> =
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crate::BitWriter<'a, u32, INTENCLR_SPEC, NOTRESOLVED_AW, O>;
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impl<'a, const O: u8> NOTRESOLVED_W<'a, O> {
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#[doc = "Disable"]
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#[inline(always)]
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pub fn clear(self) -> &'a mut W {
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self.variant(NOTRESOLVED_AW::CLEAR)
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}
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}
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impl R {
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#[doc = "Bit 0 - Write '1' to disable interrupt for event END"]
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#[inline(always)]
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pub fn end(&self) -> END_R {
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END_R::new((self.bits & 1) != 0)
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}
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#[doc = "Bit 1 - Write '1' to disable interrupt for event RESOLVED"]
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#[inline(always)]
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pub fn resolved(&self) -> RESOLVED_R {
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RESOLVED_R::new(((self.bits >> 1) & 1) != 0)
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}
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#[doc = "Bit 2 - Write '1' to disable interrupt for event NOTRESOLVED"]
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#[inline(always)]
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pub fn notresolved(&self) -> NOTRESOLVED_R {
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NOTRESOLVED_R::new(((self.bits >> 2) & 1) != 0)
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}
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}
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impl W {
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#[doc = "Bit 0 - Write '1' to disable interrupt for event END"]
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#[inline(always)]
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#[must_use]
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pub fn end(&mut self) -> END_W<0> {
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END_W::new(self)
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}
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#[doc = "Bit 1 - Write '1' to disable interrupt for event RESOLVED"]
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#[inline(always)]
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#[must_use]
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pub fn resolved(&mut self) -> RESOLVED_W<1> {
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RESOLVED_W::new(self)
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}
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#[doc = "Bit 2 - Write '1' to disable interrupt for event NOTRESOLVED"]
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#[inline(always)]
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#[must_use]
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pub fn notresolved(&mut self) -> NOTRESOLVED_W<2> {
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NOTRESOLVED_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Disable interrupt\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [intenclr](index.html) module"]
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pub struct INTENCLR_SPEC;
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impl crate::RegisterSpec for INTENCLR_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [intenclr::R](R) reader structure"]
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impl crate::Readable for INTENCLR_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [intenclr::W](W) writer structure"]
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impl crate::Writable for INTENCLR_SPEC {
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type Writer = W;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
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}
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#[doc = "`reset()` method sets INTENCLR to value 0"]
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impl crate::Resettable for INTENCLR_SPEC {
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const RESET_VALUE: Self::Ux = 0;
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}
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