Add new FPGA test firmware by Sylvain Munaut
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parent
7aec4e289c
commit
dda9973372
3 changed files with 8726 additions and 2 deletions
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@ -1,4 +1,4 @@
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unsigned char proto2_bin[] = {
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const unsigned char proto2_bin[] = {
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0xff, 0x00, 0x00, 0xff, 0x7e, 0xaa, 0x99, 0x7e, 0x51, 0x00, 0x01, 0x05,
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0x92, 0x00, 0x20, 0x62, 0x02, 0xb3, 0x82, 0x00, 0x00, 0x72, 0x01, 0x50,
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0x11, 0x00, 0x01, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
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@ -5,6 +5,7 @@
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#include <freertos/FreeRTOS.h>
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#include <freertos/queue.h>
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#include "fpga.h"
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#include "selftest.h"
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#include "ili9341.h"
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#include "ice40.h"
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#include "rp2040.h"
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@ -113,9 +114,43 @@ esp_err_t verify_file_in_psram(ICE40* ice40, FILE* fd) {
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return ESP_OK;
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}
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void test_spi(ICE40* ice40) {
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esp_err_t res;
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uint8_t r1[8], r2[8];
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uint8_t data0[8] = {0x01, 0x23, 0x45, 0x67, 0x01, 0x23, 0x45, 0x67};
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uint8_t data1[8] = {0x89, 0xab, 0xcd, 0xef, 0x89, 0xab, 0xcd, 0xef};
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res = ice40_send(ice40, data0, 8);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Transaction 1 failed");
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return;
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}
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res = ice40_transaction(ice40, data1, 8, r1, 8);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Transaction 2 failed");
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return;
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}
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printf("Transaction 2 result: ");
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for (uint8_t i = 0; i < 8; i++) printf("%02X ", r1[i]);
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printf("\n");
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res = ice40_receive(ice40, r2, 8);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Transaction 3 failed");
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return;
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}
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printf("Transaction 3 result: ");
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for (uint8_t i = 0; i < 8; i++) printf("%02X ", r2[i]);
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printf("\n");
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}
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void fpga_test(ILI9341* ili9341, ICE40* ice40, xQueueHandle buttonQueue) {
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esp_err_t res;
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bool reload_fpga = false;
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bool load_old_bitstream = false;
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do {
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printf("Start FPGA test...\n");
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reload_fpga = false;
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@ -129,13 +164,19 @@ void fpga_test(ILI9341* ili9341, ICE40* ice40, xQueueHandle buttonQueue) {
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ili9341_select(ili9341, true);
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printf("FPGA load...\n");
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res = ice40_load_bitstream(ice40, proto2_bin, proto2_bin_len);
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if (load_old_bitstream) {
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res = ice40_load_bitstream(ice40, proto2_bin, sizeof(proto2_bin));
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} else {
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res = ice40_load_bitstream(ice40, selftest_sw_bin, sizeof(selftest_sw_bin));
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}
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if (res != ESP_OK) {
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printf("Failed to load app bitstream into FPGA (%d)\n", res);
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return;
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} else {
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printf("Bitstream loaded succesfully!\n");
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}
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test_spi(ice40);
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bool waitForChoice = true;
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while (waitForChoice) {
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@ -147,11 +188,16 @@ void fpga_test(ILI9341* ili9341, ICE40* ice40, xQueueHandle buttonQueue) {
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switch(buttonMessage.input) {
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case RP2040_INPUT_BUTTON_HOME:
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case RP2040_INPUT_BUTTON_MENU:
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waitForChoice = false;
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break;
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case RP2040_INPUT_BUTTON_BACK:
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reload_fpga = true;
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load_old_bitstream = true;
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waitForChoice = false;
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break;
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case RP2040_INPUT_BUTTON_ACCEPT:
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reload_fpga = true;
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load_old_bitstream = false;
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waitForChoice = false;
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break;
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default:
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8678
main/selftest.h
Normal file
8678
main/selftest.h
Normal file
File diff suppressed because it is too large
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