Use separate SPI device structure for full and half duplex SPI transfers
This commit is contained in:
parent
3c5efa9087
commit
7aec4e289c
2 changed files with 3 additions and 2 deletions
|
@ -131,7 +131,8 @@ esp_err_t board_init(bool* aLcdReady) {
|
|||
dev_ice40.pin_done = -1;
|
||||
dev_ice40.pin_reset = -1;
|
||||
dev_ice40.pin_int = GPIO_INT_FPGA;
|
||||
dev_ice40.spi_speed = 23000000; // 23MHz
|
||||
dev_ice40.spi_speed_full_duplex = 26700000;
|
||||
dev_ice40.spi_speed_half_duplex = 40000000;
|
||||
dev_ice40.spi_max_transfer_size = SPI_MAX_TRANSFER_SIZE;
|
||||
dev_ice40.get_done = ice40_get_done_wrapper;
|
||||
dev_ice40.set_reset = ice40_set_reset_wrapper;
|
||||
|
|
|
@ -1 +1 @@
|
|||
Subproject commit 4263f4f60d3d410ebf2ae88a7a26b23bd08eedde
|
||||
Subproject commit 3b2767dea615e7f4c069f03d900b56d8da48af22
|
Loading…
Reference in a new issue