2022-04-08 21:15:57 +00:00
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#include <stdio.h>
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#include <string.h>
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2022-05-31 14:13:38 +00:00
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#include <unistd.h>
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2022-04-08 21:15:57 +00:00
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#include <esp_log.h>
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#include <freertos/FreeRTOS.h>
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#include <freertos/queue.h>
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2022-05-31 14:13:38 +00:00
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#include <driver/gpio.h>
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#include "hardware.h"
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2022-04-08 21:15:57 +00:00
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#include "ili9341.h"
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#include "ice40.h"
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2022-04-23 02:00:55 +00:00
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#include "rp2040.h"
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2022-05-31 14:13:38 +00:00
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#include "fpga_test.h"
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2022-04-08 21:15:57 +00:00
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2022-05-30 21:56:23 +00:00
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extern const uint8_t fpga_selftest_bin_start[] asm("_binary_fpga_selftest_bin_start");
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extern const uint8_t fpga_selftest_bin_end[] asm("_binary_fpga_selftest_bin_end");
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2022-05-31 14:13:38 +00:00
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2022-04-08 21:15:57 +00:00
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static const char *TAG = "fpga_test";
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esp_err_t load_file_into_psram(ICE40* ice40, FILE* fd) {
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fseek(fd, 0, SEEK_SET);
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const uint8_t write_cmd = 0x02;
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uint32_t amount_read;
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uint32_t position = 0;
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uint8_t* tx_buffer = malloc(SPI_MAX_TRANSFER_SIZE);
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if (tx_buffer == NULL) return ESP_FAIL;
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2022-05-31 14:13:38 +00:00
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/* SPI commands */
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#define SPI_CMD_NOP1 0x00
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#define SPI_CMD_SOC_MSG 0x10
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#define SPI_CMD_REG_ACCESS 0xf0
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#define SPI_CMD_LOOPBACK 0xf1
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#define SPI_CMD_LCD_PASSTHROUGH 0xf2
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#define SPI_CMD_BUTTON_REPORT 0xf4
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#define SPI_CMD_IRQ_ACK 0xfd
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#define SPI_CMD_RESP_ACK 0xfe
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#define SPI_CMD_NOP2 0xff
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2022-04-08 21:15:57 +00:00
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2022-05-31 14:13:38 +00:00
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/* Messages to self-test SoC */
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#define SOC_CMD_PING 0x00
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#define SOC_CMD_PING_PARAM 0xc0ffee
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#define SOC_CMD_PING_RESP 0xcafebabe
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#define SOC_CMD_RGB_STATE_SET 0x10
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#define SOC_CMD_IRQN_SET 0x11
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#define SOC_CMD_LCD_RGB_CYCLE_SET 0x12
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#define SOC_CMD_PMOD_CYCLE_SET 0x13
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#define SOC_CMD_LCD_PASSTHROUGH_SET 0x14
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#define SOC_CMD_PSRAM_TEST 0x20
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#define SOC_CMD_UART_LOOPBACK_TEST 0x21
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#define SOC_CMD_PMOD_OPEN_TEST 0x22
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#define SOC_CMD_PMOD_PLUG_TEST 0x23
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#define SOC_CMD_LCD_INIT_TEST 0x24
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#define SOC_CMD_LCD_CHECK_MODE 0x30
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#define SOC_RESP_OK 0x00000000
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/* SoC commands */
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static bool soc_message(ICE40* ice40, uint8_t cmd, uint32_t param, uint32_t *resp, TickType_t ticks_to_wait) {
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esp_err_t res;
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uint8_t data_tx[6];
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uint8_t data_rx[6];
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/* Default delay */
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ticks_to_wait /= 10; /* We do 10 retries */
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if (!ticks_to_wait)
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ticks_to_wait = pdMS_TO_TICKS(50);
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/* Prepare message */
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data_tx[0] = SPI_CMD_SOC_MSG;
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data_tx[1] = cmd;
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data_tx[2] = (param >> 16) & 0xff;
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data_tx[3] = (param >> 8) & 0xff;
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data_tx[4] = (param ) & 0xff;
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/* Send message to PicoRV */
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res = ice40_send_turbo(ice40, data_tx, 5);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "SoC message TX failed");
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return false;
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}
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/* Poll until we get a response */
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data_tx[0] = SPI_CMD_RESP_ACK;
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for (int i=0; i<10; i++) {
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/* Poll */
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res = ice40_transaction(ice40, data_tx, 6, data_rx, 6);
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2022-04-08 21:15:57 +00:00
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "SoC response RX failed");
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return false;
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2022-04-08 21:15:57 +00:00
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}
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/* Was response valid ? */
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if (data_rx[1] & 0x80)
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break;
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/* Wait before retry */
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vTaskDelay(ticks_to_wait);
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}
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if (!(data_rx[1] & 0x80)) {
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ESP_LOGE(TAG, "SoC response RX timeout");
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return false;
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}
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/* Report response */
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if (resp) {
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*resp = 0;
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for (int i=0; i<4; i++)
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*resp = (*resp << 8) | data_rx[2+i];
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}
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return true;
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2022-04-08 21:15:57 +00:00
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}
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2022-05-31 14:13:38 +00:00
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/* Test routines */
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static bool test_bitstream_load(ICE40* ice40, uint32_t *rc) {
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esp_err_t res;
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res = ice40_load_bitstream(ice40, fpga_selftest_bin_start, fpga_selftest_bin_end - fpga_selftest_bin_start);
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if (res != ESP_OK) {
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*rc = res;
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return false;
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}
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*rc = 0;
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return true;
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2022-04-08 21:15:57 +00:00
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}
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static bool test_spi_loopback_one(ICE40* ice40) {
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esp_err_t res;
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2022-05-31 14:13:38 +00:00
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uint8_t data_tx[257];
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uint8_t data_rx[258];
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/* Generate pseudo random sequence */
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data_tx[1] = 1;
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for (int i = 2; i < 257; i++)
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2022-05-17 09:02:38 +00:00
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data_tx[i] = (data_tx[i-1] << 1) ^ ((data_tx[i-1] & 0x80) ? 0x1d : 0x00);
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2022-05-31 14:13:38 +00:00
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/* Send 256 bytes at high speed with echo command */
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data_tx[0] = SPI_CMD_LOOPBACK;
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res = ice40_send_turbo(ice40, data_tx, 257);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "SPI loopback transaction 1 failed (Turbo TX)");
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return false;
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2022-05-08 15:33:39 +00:00
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}
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2022-05-31 14:13:38 +00:00
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/* Execute full duplex transaction with next 128 bytes */
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res = ice40_transaction(ice40, data_tx, 257, data_rx, 257);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "SPI loopback transaction 2 failed (Full Duplex)");
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return false;
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}
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/* Validate response present */
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if ((data_rx[1] & 0x80) == 0) {
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ESP_LOGE(TAG, "SPI loopback transaction 2 reports no response available\n");
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return false;
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2022-05-08 15:33:39 +00:00
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}
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2022-05-31 14:13:38 +00:00
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/* Validate RX data (only 254 byte got read) */
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if (memcmp(&data_rx[2], &data_tx[1], 254)) {
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ESP_LOGE(TAG, "SPI loopback transaction 1->2 integrity fail:\n");
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for (int i = 0; i < 254; i++)
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printf("%02X%c", data_rx[i], ((i&0xf)==0xf) ? '\n' : ' ');
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printf("\n");
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return false;
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}
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2022-05-08 15:33:39 +00:00
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2022-05-31 14:13:38 +00:00
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/* Read two responses and ack them */
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for (int t = 0; t < 2; t++) {
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/* Receive half duplex */
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res = ice40_receive(ice40, data_rx, 258);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "SPI loopback transaction 3.%d failed (Half Duplex RX)", t);
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return false;
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}
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/* Short acknowledge command */
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data_tx[0] = SPI_CMD_RESP_ACK;
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res = ice40_send_turbo(ice40, data_tx, 1);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "SPI loopback transaction 4.%d failed (Turbo ACK)", t);
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return false;
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}
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/* Validate response present */
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if ((data_rx[1] & 0x80) == 0) {
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ESP_LOGE(TAG, "SPI loopback transaction 3.%d reports no response available\n", t);
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return false;
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}
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/* Validate RX data (only 254 byte got read) */
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if (memcmp(&data_rx[2], &data_tx[1], 254)) {
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ESP_LOGE(TAG, "SPI loopback transaction %d->3.%d integrity fail:\n", 1+t, t);
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for (int i = 0; i < 254; i++)
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printf("%02X%c", data_rx[i], ((i&0xf)==0xf) ? '\n' : ' ');
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printf("\n");
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return false;
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}
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}
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/* Check there is no more responses pending */
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data_tx[0] = SPI_CMD_NOP2;
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res = ice40_transaction(ice40, data_tx, 2, data_rx, 2);
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2022-05-08 15:33:39 +00:00
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if (res != ESP_OK) {
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2022-05-31 14:13:38 +00:00
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ESP_LOGE(TAG, "SPI loopback transaction 5 failed (Full Duplex)");
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2022-05-17 09:02:38 +00:00
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return false;
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2022-05-08 15:33:39 +00:00
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}
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2022-05-31 14:13:38 +00:00
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if ((data_rx[1] & 0x80) != 0) {
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ESP_LOGE(TAG, "SPI loopback transaction 5 reports response available\n");
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return false;
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}
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return true;
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}
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static bool test_spi_loopback(ICE40* ice40, uint32_t *rc) {
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int i;
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/* Run test 256 times */
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for (i=0; i<256; i++) {
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if (!test_spi_loopback_one(ice40))
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break;
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}
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/* Failure ? */
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if (i != 256) {
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*rc = i + 1;
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return false;
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}
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/* OK ! */
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*rc = 0;
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return true;
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}
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static bool test_soc_loopback(ICE40 *ice40, uint32_t *rc) {
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/* Execute command */
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if (!soc_message(ice40, SOC_CMD_PING, SOC_CMD_PING_PARAM, rc, 0)) {
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*rc = -1;
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return false;
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}
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/* Check response */
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if (*rc != SOC_CMD_PING_RESP)
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return false;
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/* Success */
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*rc = 0;
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return true;
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}
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2022-05-31 14:13:38 +00:00
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static bool test_uart_loopback(ICE40* ice40, uint32_t *rc) {
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/* Enable loopback mode of RP2040 */
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rp2040_set_fpga_loopback(get_rp2040(), true, true);
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vTaskDelay(pdMS_TO_TICKS(10));
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/* Execute command */
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if (!soc_message(ice40, SOC_CMD_UART_LOOPBACK_TEST, 0, rc, 0)) {
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*rc = -1;
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return false;
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}
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/* Disable loopback mode of RP2040 */
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rp2040_set_fpga_loopback(get_rp2040(), true, false);
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/* Check response */
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return *rc == SOC_RESP_OK;
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}
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static bool test_psram(ICE40* ice40, uint32_t *rc) {
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/* Execute command */
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if (!soc_message(ice40, SOC_CMD_PSRAM_TEST, 0, rc, pdMS_TO_TICKS(1000))) {
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*rc = -1;
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return false;
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}
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/* Check response */
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return *rc == SOC_RESP_OK;
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}
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static bool test_irq_n(ICE40* ice40, uint32_t *rc) {
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esp_err_t res;
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2022-05-31 14:13:38 +00:00
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/* Set pin as input */
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res = gpio_set_direction(GPIO_INT_FPGA, GPIO_MODE_INPUT);
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if (res != ESP_OK) {
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*rc = 32;
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return false;
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}
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/* Assert interrupt line */
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if (!soc_message(ice40, SOC_CMD_IRQN_SET, 1, rc, 0)) {
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*rc = -1;
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return false;
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}
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if (*rc != SOC_RESP_OK)
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return false;
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/* Check level is 0 */
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if (gpio_get_level(GPIO_INT_FPGA) != 0) {
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*rc = 16;
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return false;
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}
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/* Release interrupt line */
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if (!soc_message(ice40, SOC_CMD_IRQN_SET, 0, rc, 0)) {
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*rc = -1;
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return false;
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}
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if (*rc != SOC_RESP_OK)
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return false;
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/* Check level is 1 */
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if (gpio_get_level(GPIO_INT_FPGA) != 1) {
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*rc = 16;
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return false;
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|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool test_lcd_mode(ICE40* ice40, uint32_t *rc) {
|
|
|
|
esp_err_t res;
|
|
|
|
bool ok;
|
|
|
|
|
|
|
|
/* Defaults */
|
|
|
|
ok = true;
|
|
|
|
*rc = 0;
|
|
|
|
|
|
|
|
/* Check state is 0 */
|
|
|
|
if (!soc_message(ice40, SOC_CMD_LCD_CHECK_MODE, 0, rc, 0)) {
|
|
|
|
*rc = 16;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (*rc != SOC_RESP_OK)
|
|
|
|
return false;
|
|
|
|
|
|
|
|
/* Set LCD mode to 1 */
|
|
|
|
res = gpio_set_level(GPIO_LCD_MODE, 1);
|
|
|
|
if (res != ESP_OK) {
|
|
|
|
*rc = 32;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check state is 1 */
|
|
|
|
if (!soc_message(ice40, SOC_CMD_LCD_CHECK_MODE, 1, rc, 0)) {
|
|
|
|
*rc = 17;
|
|
|
|
ok = false;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (*rc != SOC_RESP_OK)
|
|
|
|
ok = false;
|
|
|
|
|
|
|
|
/* Set LCD mode back to 0 */
|
|
|
|
res = gpio_set_level(GPIO_LCD_MODE, 0);
|
|
|
|
if (res != ESP_OK) {
|
|
|
|
*rc = 33;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* All good */
|
|
|
|
return ok;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool test_pmod_open(ICE40* ice40, uint32_t *rc) {
|
|
|
|
/* Execute command */
|
|
|
|
if (!soc_message(ice40, SOC_CMD_PMOD_OPEN_TEST, 0, rc, 0)) {
|
|
|
|
*rc = -1;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check response */
|
|
|
|
return *rc == SOC_RESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool test_pmod_plug(ICE40* ice40, uint32_t *rc) {
|
|
|
|
/* Execute command */
|
|
|
|
if (!soc_message(ice40, SOC_CMD_PMOD_PLUG_TEST, 0, rc, 0)) {
|
|
|
|
*rc = -1;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check response */
|
|
|
|
return *rc == SOC_RESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool test_lcd_init(ICE40* ice40, uint32_t *rc) {
|
|
|
|
/* Execute command */
|
|
|
|
if (!soc_message(ice40, SOC_CMD_LCD_INIT_TEST, 0, rc, 0)) {
|
|
|
|
*rc = -1;
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Check response */
|
|
|
|
return *rc == SOC_RESP_OK;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
typedef bool (*test_fn)(ICE40 *ice40, uint32_t *rc);
|
|
|
|
|
|
|
|
|
|
|
|
static bool wait_button(xQueueHandle buttonQueue) {
|
|
|
|
rp2040_input_message_t buttonMessage = {0};
|
|
|
|
|
|
|
|
while (1) {
|
|
|
|
if (xQueueReceive(buttonQueue, &buttonMessage, 0) == pdTRUE) {
|
|
|
|
if (buttonMessage.state) {
|
|
|
|
switch(buttonMessage.input) {
|
|
|
|
case RP2040_INPUT_BUTTON_HOME:
|
|
|
|
case RP2040_INPUT_BUTTON_MENU:
|
|
|
|
case RP2040_INPUT_BUTTON_BACK:
|
|
|
|
return false;
|
|
|
|
case RP2040_INPUT_BUTTON_ACCEPT:
|
|
|
|
return true;
|
|
|
|
default:
|
|
|
|
break;
|
2022-04-08 21:15:57 +00:00
|
|
|
}
|
|
|
|
}
|
2022-05-31 14:13:38 +00:00
|
|
|
} else {
|
|
|
|
vTaskDelay(pdMS_TO_TICKS(10));
|
2022-04-08 21:15:57 +00:00
|
|
|
}
|
2022-05-31 14:13:38 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static bool run_test(ICE40* ice40, pax_buf_t* pax_buffer, const pax_font_t *font, ILI9341* ili9341, int line,
|
|
|
|
const char *test_name, test_fn fn) {
|
|
|
|
bool rv;
|
|
|
|
uint32_t rc;
|
|
|
|
|
|
|
|
/* Test name */
|
|
|
|
pax_draw_text(pax_buffer, 0xffffffff, font, 18, 0, 20*line, test_name);
|
|
|
|
if (ili9341)
|
|
|
|
ili9341_write(ili9341, pax_buffer->buf);
|
|
|
|
|
|
|
|
/* Run the test */
|
|
|
|
rv = fn(ice40, &rc);
|
|
|
|
|
|
|
|
/* Display result */
|
|
|
|
if (!rv) {
|
|
|
|
/* Error */
|
|
|
|
char buf[10];
|
|
|
|
snprintf(buf, sizeof(buf), "%08x", rc);
|
|
|
|
pax_draw_text(pax_buffer, 0xffff0000, font, 18, 200, 20*line, buf);
|
|
|
|
} else {
|
|
|
|
/* OK ! */
|
|
|
|
pax_draw_text(pax_buffer, 0xff00ff00, font, 18, 200, 20*line, " OK");
|
|
|
|
}
|
|
|
|
|
|
|
|
if (ili9341)
|
|
|
|
ili9341_write(ili9341, pax_buffer->buf);
|
|
|
|
|
|
|
|
/* Pass through the 'OK' status */
|
|
|
|
return rv;
|
|
|
|
}
|
|
|
|
|
|
|
|
#define RUN_TEST(name, fn) do {\
|
|
|
|
ok &= run_test(ice40, pax_buffer, font, ili9341, line++, name, fn); \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define RUN_TEST_MANDATORY(name, fn) do {\
|
|
|
|
if (!run_test(ice40, pax_buffer, font, ili9341, line++, name, fn)) { \
|
|
|
|
pax_draw_text(pax_buffer, 0xffff0000, font, 18, 0, 20*line, "Aborted"); \
|
|
|
|
ili9341_write(ili9341, pax_buffer->buf); \
|
|
|
|
ok = false; \
|
|
|
|
goto error; \
|
|
|
|
} \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
#define RUN_TEST_BLIND(name, fn) do {\
|
|
|
|
ok &= run_test(ice40, pax_buffer, font, NULL, line++, name, fn); \
|
|
|
|
} while (0)
|
|
|
|
|
|
|
|
|
|
|
|
static void
|
|
|
|
run_all_tests(xQueueHandle buttonQueue, ICE40* ice40, pax_buf_t* pax_buffer, ILI9341* ili9341)
|
|
|
|
{
|
|
|
|
const pax_font_t *font;
|
|
|
|
int line = 0;
|
|
|
|
bool ok = true;
|
|
|
|
|
|
|
|
/* Screen init */
|
|
|
|
font = pax_get_font("sky mono");
|
|
|
|
|
|
|
|
pax_noclip(pax_buffer);
|
|
|
|
pax_background(pax_buffer, 0x8060f0);
|
|
|
|
ili9341_write(ili9341, pax_buffer->buf);
|
|
|
|
|
|
|
|
/* Run mandatory tests */
|
|
|
|
RUN_TEST_MANDATORY("Bitstream load", test_bitstream_load);
|
|
|
|
RUN_TEST_MANDATORY("SPI loopback", test_spi_loopback);
|
|
|
|
RUN_TEST_MANDATORY("SoC loopback", test_soc_loopback);
|
|
|
|
|
|
|
|
/* Set indicator to "in-progress" */
|
|
|
|
soc_message(ice40, SOC_CMD_RGB_STATE_SET, 1, NULL, 0);
|
|
|
|
|
|
|
|
/* Run non-interactive tests */
|
|
|
|
RUN_TEST("UART loopback", test_uart_loopback);
|
|
|
|
RUN_TEST("PSRAM", test_psram);
|
|
|
|
RUN_TEST("IRQ_n signal", test_irq_n);
|
|
|
|
RUN_TEST("LCD_MODE signal", test_lcd_mode);
|
|
|
|
RUN_TEST("PMOD open", test_pmod_open);
|
|
|
|
|
|
|
|
/* Show instructions for interactive test */
|
|
|
|
pax_draw_text(pax_buffer, 0xffc0c0c0, font, 9, 25, 20*line+ 0, "Insert PMOD plug");
|
|
|
|
pax_draw_text(pax_buffer, 0xffc0c0c0, font, 9, 25, 20*line+10, "Then press button for interactive test");
|
|
|
|
pax_draw_text(pax_buffer, 0xffc0c0c0, font, 9, 25, 20*line+20, " - Check LCD color bars");
|
|
|
|
pax_draw_text(pax_buffer, 0xffc0c0c0, font, 9, 25, 20*line+30, " - Then LCD & RGB led color cycling");
|
|
|
|
ili9341_write(ili9341, pax_buffer->buf);
|
|
|
|
|
|
|
|
/* Wait for button */
|
|
|
|
wait_button(buttonQueue);
|
|
|
|
|
|
|
|
/* Clear the instructions from buffer */
|
|
|
|
pax_draw_rect(pax_buffer, 0xff8060f0, 0, 20*line, 320, 240-20*line);
|
|
|
|
|
|
|
|
/* Handover LCD to FPGA */
|
|
|
|
ili9341_deinit(ili9341);
|
|
|
|
|
|
|
|
/* Run interactive tests */
|
|
|
|
RUN_TEST("PMOD plug", test_pmod_plug);
|
|
|
|
RUN_TEST("LCD init", test_lcd_init);
|
|
|
|
|
|
|
|
/* Wait a second (for user to see color bars) */
|
|
|
|
vTaskDelay(pdMS_TO_TICKS(1000));
|
|
|
|
|
|
|
|
/* Start LCD / RGB cycling */
|
|
|
|
soc_message(ice40, SOC_CMD_LCD_RGB_CYCLE_SET, 1, NULL, 0);
|
|
|
|
|
|
|
|
/* Wait for button */
|
|
|
|
wait_button(buttonQueue);
|
|
|
|
|
|
|
|
/* Stop LCD / RGB cycling */
|
|
|
|
soc_message(ice40, SOC_CMD_LCD_RGB_CYCLE_SET, 0, NULL, 0);
|
|
|
|
|
|
|
|
/* Take control of the LCD back and refresh screen */
|
|
|
|
ili9341_init(ili9341);
|
|
|
|
|
|
|
|
error:
|
|
|
|
/* Update indicator */
|
|
|
|
soc_message(ice40, SOC_CMD_RGB_STATE_SET, ok ? 2 : 3, NULL, 0);
|
|
|
|
|
|
|
|
/* Pass / Fail result on screen */
|
|
|
|
if (ok)
|
|
|
|
pax_draw_text(pax_buffer, 0xff00ff00, font, 36, 100, 20*line, "PASS");
|
|
|
|
else
|
|
|
|
pax_draw_text(pax_buffer, 0xffff0000, font, 36, 100, 20*line, "FAIL");
|
|
|
|
|
|
|
|
ili9341_write(ili9341, pax_buffer->buf);
|
|
|
|
|
|
|
|
/* Done, just wait for button */
|
|
|
|
wait_button(buttonQueue);
|
|
|
|
|
|
|
|
/* Cleanup */
|
|
|
|
ice40_disable(ice40);
|
|
|
|
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
void fpga_test(xQueueHandle buttonQueue, ICE40* ice40, pax_buf_t* pax_buffer, ILI9341* ili9341) {
|
|
|
|
run_all_tests(buttonQueue, ice40, pax_buffer, ili9341);
|
2022-04-08 21:15:57 +00:00
|
|
|
}
|