mirror of
https://github.com/ferrous-systems/embedded-trainings-2020.git
synced 2024-05-24 11:18:05 +00:00
81 lines
2.8 KiB
Rust
81 lines
2.8 KiB
Rust
#[doc = "Register `CTIV` reader"]
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pub struct R(crate::R<CTIV_SPEC>);
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impl core::ops::Deref for R {
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type Target = crate::R<CTIV_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl From<crate::R<CTIV_SPEC>> for R {
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#[inline(always)]
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fn from(reader: crate::R<CTIV_SPEC>) -> Self {
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R(reader)
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}
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}
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#[doc = "Register `CTIV` writer"]
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pub struct W(crate::W<CTIV_SPEC>);
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impl core::ops::Deref for W {
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type Target = crate::W<CTIV_SPEC>;
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#[inline(always)]
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fn deref(&self) -> &Self::Target {
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&self.0
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}
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}
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impl core::ops::DerefMut for W {
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#[inline(always)]
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fn deref_mut(&mut self) -> &mut Self::Target {
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&mut self.0
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}
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}
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impl From<crate::W<CTIV_SPEC>> for W {
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#[inline(always)]
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fn from(writer: crate::W<CTIV_SPEC>) -> Self {
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W(writer)
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}
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}
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#[doc = "Field `CTIV` reader - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
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pub type CTIV_R = crate::FieldReader<u8, u8>;
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#[doc = "Field `CTIV` writer - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
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pub type CTIV_W<'a, const O: u8> = crate::FieldWriter<'a, u32, CTIV_SPEC, u8, u8, 7, O>;
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impl R {
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#[doc = "Bits 0:6 - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
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#[inline(always)]
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pub fn ctiv(&self) -> CTIV_R {
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CTIV_R::new((self.bits & 0x7f) as u8)
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}
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}
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impl W {
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#[doc = "Bits 0:6 - Calibration timer interval in multiple of 0.25 seconds. Range: 0.25 seconds to 31.75 seconds."]
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#[inline(always)]
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#[must_use]
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pub fn ctiv(&mut self) -> CTIV_W<0> {
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CTIV_W::new(self)
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}
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#[doc = "Writes raw bits to the register."]
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#[inline(always)]
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pub unsafe fn bits(&mut self, bits: u32) -> &mut Self {
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self.0.bits(bits);
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self
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}
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}
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#[doc = "Calibration timer interval\n\nThis register you can [`read`](crate::generic::Reg::read), [`write_with_zero`](crate::generic::Reg::write_with_zero), [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`modify`](crate::generic::Reg::modify). See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [ctiv](index.html) module"]
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pub struct CTIV_SPEC;
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impl crate::RegisterSpec for CTIV_SPEC {
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type Ux = u32;
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}
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#[doc = "`read()` method returns [ctiv::R](R) reader structure"]
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impl crate::Readable for CTIV_SPEC {
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type Reader = R;
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}
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#[doc = "`write(|w| ..)` method takes [ctiv::W](W) writer structure"]
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impl crate::Writable for CTIV_SPEC {
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type Writer = W;
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const ZERO_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
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const ONE_TO_MODIFY_FIELDS_BITMAP: Self::Ux = 0;
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}
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#[doc = "`reset()` method sets CTIV to value 0"]
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impl crate::Resettable for CTIV_SPEC {
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const RESET_VALUE: Self::Ux = 0;
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}
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