229 lines
7.8 KiB
C
229 lines
7.8 KiB
C
#include "fpga_test.h"
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#include <stdio.h>
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#include <string.h>
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#include <esp_log.h>
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#include <freertos/FreeRTOS.h>
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#include <freertos/queue.h>
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#include "ili9341.h"
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#include "ice40.h"
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#include "rp2040.h"
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#include "hardware.h"
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extern const uint8_t fpga_selftest_bin_start[] asm("_binary_fpga_selftest_bin_start");
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extern const uint8_t fpga_selftest_bin_end[] asm("_binary_fpga_selftest_bin_end");
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static const char *TAG = "fpga_test";
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esp_err_t load_file_into_psram(ICE40* ice40, FILE* fd) {
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fseek(fd, 0, SEEK_SET);
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const uint8_t write_cmd = 0x02;
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uint32_t amount_read;
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uint32_t position = 0;
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uint8_t* tx_buffer = malloc(SPI_MAX_TRANSFER_SIZE);
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if (tx_buffer == NULL) return ESP_FAIL;
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while(1) {
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tx_buffer[0] = write_cmd;
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tx_buffer[1] = (position >> 16);
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tx_buffer[2] = (position >> 8) & 0xFF;
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tx_buffer[3] = position & 0xFF;
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amount_read = fread(&tx_buffer[4], 1, SPI_MAX_TRANSFER_SIZE - 4, fd);
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if (amount_read < 1) break;
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ESP_LOGI(TAG, "Writing PSRAM @ %u (%u bytes)", position, amount_read);
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esp_err_t res = ice40_transaction(ice40, tx_buffer, amount_read + 4, NULL, 0);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Write transaction failed @ %u", position);
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free(tx_buffer);
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return res;
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}
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position += amount_read;
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};
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free(tx_buffer);
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return ESP_OK;
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}
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esp_err_t load_buffer_into_psram(ICE40* ice40, uint8_t* buffer, uint32_t buffer_length) {
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const uint8_t write_cmd = 0x02;
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uint32_t position = 0;
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uint8_t* tx_buffer = malloc(SPI_MAX_TRANSFER_SIZE);
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if (tx_buffer == NULL) return ESP_FAIL;
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while(1) {
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tx_buffer[0] = write_cmd;
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tx_buffer[1] = (position >> 16);
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tx_buffer[2] = (position >> 8) & 0xFF;
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tx_buffer[3] = position & 0xFF;
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uint32_t length = buffer_length - position;
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if (length > SPI_MAX_TRANSFER_SIZE - 4) length = SPI_MAX_TRANSFER_SIZE - 4;
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memcpy(&tx_buffer[4], &buffer[position], length);
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if (length == 0) break;
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ESP_LOGI(TAG, "Writing PSRAM @ %u (%u bytes)", position, length);
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esp_err_t res = ice40_transaction(ice40, tx_buffer, length + 4, NULL, 0);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Write transaction failed @ %u", position);
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free(tx_buffer);
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return res;
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}
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position += length;
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};
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free(tx_buffer);
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return ESP_OK;
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}
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esp_err_t verify_file_in_psram(ICE40* ice40, FILE* fd) {
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fseek(fd, 0, SEEK_SET);
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const uint8_t read_cmd = 0x03;
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uint32_t amount_read;
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uint32_t position = 0;
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uint8_t* tx_buffer = malloc(SPI_MAX_TRANSFER_SIZE);
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if (tx_buffer == NULL) return ESP_FAIL;
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memset(tx_buffer, 0, SPI_MAX_TRANSFER_SIZE);
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uint8_t* verify_buffer = malloc(SPI_MAX_TRANSFER_SIZE);
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if (verify_buffer == NULL) return ESP_FAIL;
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uint8_t* rx_buffer = malloc(SPI_MAX_TRANSFER_SIZE);
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if (rx_buffer == NULL) return ESP_FAIL;
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while(1) {
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tx_buffer[0] = read_cmd;
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tx_buffer[1] = (position >> 16);
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tx_buffer[2] = (position >> 8) & 0xFF;
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tx_buffer[3] = position & 0xFF;
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amount_read = fread(&verify_buffer[4], 1, SPI_MAX_TRANSFER_SIZE - 4, fd);
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if (amount_read < 1) break;
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ESP_LOGI(TAG, "Reading PSRAM @ %u (%u bytes)", position, amount_read);
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esp_err_t res = ice40_transaction(ice40, tx_buffer, amount_read + 4, rx_buffer, amount_read + 4);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Read transaction failed @ %u", position);
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free(tx_buffer);
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return res;
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}
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position += amount_read;
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ESP_LOGI(TAG, "Verifying PSRAM @ %u (%u bytes)", position, amount_read);
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for (uint32_t i = 4; i < amount_read; i++) {
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if (rx_buffer[i] != verify_buffer[i]) {
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ESP_LOGE(TAG, "Verifying PSRAM @ %u failed: %02X != %02X", position + i, rx_buffer[i], verify_buffer[i]);
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free(tx_buffer);
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free(rx_buffer);
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free(verify_buffer);
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return ESP_FAIL;
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}
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}
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};
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free(tx_buffer);
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free(rx_buffer);
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free(verify_buffer);
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ESP_LOGI(TAG, "PSRAM contents verified!");
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return ESP_OK;
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}
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bool test_spi(ICE40* ice40) {
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esp_err_t res;
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uint8_t data_tx[256];
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uint8_t data_rx[128];
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// Generate pseudo random sequence
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data_tx[0] = 1;
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for (int i = 1; i < 256; i++)
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data_tx[i] = (data_tx[i-1] << 1) ^ ((data_tx[i-1] & 0x80) ? 0x1d : 0x00);
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// Send first 128 byte at high speed
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res = ice40_send_turbo(ice40, &data_tx[0], 128);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Transaction 1 failed (Turbo TX)");
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return false;
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}
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// Execute full duplex transaction with next 128 bytes
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res = ice40_transaction(ice40, &data_tx[128], 128, data_rx, 128);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Transaction 2 failed (Full Duplex)");
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return false;
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}
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// Validate RX data
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if (memcmp(&data_rx[1], &data_tx[0], 127)) {
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printf("Transaction 1->2 integrity fail:\n");
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for (int i = 0; i < 128; i++)
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printf("%02X%c", data_rx[i], ((i&0xf)==0xf) ? '\n' : ' ');
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printf("\n");
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return false;
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}
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// Receive half duplex
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res = ice40_receive(ice40, data_rx, 128);
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if (res != ESP_OK) {
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ESP_LOGE(TAG, "Transaction 3 failed (Half Duplex RX)");
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return false;
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}
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// Validate RX data
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if (memcmp(&data_rx[1], &data_tx[128], 127)) {
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printf("Transaction 2->3 integrity fail:\n");
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for (int i = 0; i < 128; i++)
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printf("%02X%c", data_rx[i], ((i&0xf)==0xf) ? '\n' : ' ');
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printf("\n");
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return false;
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}
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return true;
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}
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void fpga_test(ILI9341* ili9341, ICE40* ice40, xQueueHandle buttonQueue) {
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esp_err_t res;
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bool reload_fpga = false;
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do {
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printf("Start FPGA test...\n");
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reload_fpga = false;
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printf("LCD deinit...\n");
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ili9341_deinit(ili9341);
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printf("FPGA load...\n");
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res = ice40_load_bitstream(ice40, fpga_selftest_bin_start, fpga_selftest_bin_end - fpga_selftest_bin_start);
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if (res != ESP_OK) {
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printf("Failed to load app bitstream into FPGA (%d)\n", res);
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ice40_disable(ice40);
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ili9341_init(ili9341);
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return;
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} else {
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printf("Bitstream loaded succesfully!\n");
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}
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int i;
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for (i = 0; i < 256; i++)
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if (!test_spi(ice40))
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break;
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if (i == 256)
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printf("SPI test success\n");
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else
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printf("SPI test failure at iteration %d\n", i);
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bool waitForChoice = true;
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while (waitForChoice) {
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rp2040_input_message_t buttonMessage = {0};
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printf("Waiting for button press...\n");
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if (xQueueReceive(buttonQueue, &buttonMessage, portMAX_DELAY) == pdTRUE) {
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printf("Button: %u, %u\n", buttonMessage.input, buttonMessage.state);
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if (buttonMessage.state) {
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switch(buttonMessage.input) {
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case RP2040_INPUT_BUTTON_HOME:
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case RP2040_INPUT_BUTTON_MENU:
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waitForChoice = false;
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break;
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case RP2040_INPUT_BUTTON_BACK:
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reload_fpga = true;
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waitForChoice = false;
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break;
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case RP2040_INPUT_BUTTON_ACCEPT:
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reload_fpga = true;
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waitForChoice = false;
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break;
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default:
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break;
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}
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}
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}
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}
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ice40_disable(ice40);
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ili9341_init(ili9341);
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} while (reload_fpga);
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}
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