mirror of
https://github.com/badgeteam/mch2022-template-app.git
synced 2024-11-22 08:41:00 +00:00
commit
6dfe74add2
10 changed files with 71 additions and 253 deletions
6
.gitmodules
vendored
6
.gitmodules
vendored
|
@ -28,9 +28,6 @@
|
|||
[submodule "components/ws2812"]
|
||||
path = components/ws2812
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||||
url = https://github.com/badgeteam/esp32-component-ws2812.git
|
||||
[submodule "components/mch2022-efuse"]
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||||
path = components/mch2022-efuse
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||||
url = https://github.com/badgeteam/esp32-component-mch2022-efuse.git
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||||
[submodule "components/mch2022-bsp"]
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||||
path = components/mch2022-bsp
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||||
url = https://github.com/badgeteam/esp32-component-mch2022-bsp.git
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||||
|
@ -40,3 +37,6 @@
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|||
[submodule "main/pax-keyboard"]
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||||
path = components/pax-keyboard
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||||
url = https://github.com/robotman2412/pax-keyboard
|
||||
[submodule "components/i2c-bme680"]
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||||
path = components/i2c-bme680
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||||
url = https://github.com/badgeteam/esp32-component-bme680.git
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||||
|
|
1
components/i2c-bme680
Submodule
1
components/i2c-bme680
Submodule
|
@ -0,0 +1 @@
|
|||
Subproject commit 97cd2137cb41bb40f29e6ff65b47d99c7ea740c8
|
|
@ -1,5 +0,0 @@
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|||
idf_component_register(
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||||
SRCS "bme680.c"
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||||
INCLUDE_DIRS include
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REQUIRES "bus-i2c"
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)
|
|
@ -1,47 +0,0 @@
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|||
/**
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* Copyright (c) 2022 Nicolai Electronics
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*
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||||
* SPDX-License-Identifier: MIT
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||||
*/
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||||
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#include <sdkconfig.h>
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#include <esp_log.h>
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#include <driver/gpio.h>
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#include <freertos/FreeRTOS.h>
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#include <freertos/semphr.h>
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#include <freertos/task.h>
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#include "bme680.h"
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#include "managed_i2c.h"
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static const char *TAG = "BME680";
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esp_err_t bme680_check_id(BME680* device) {
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uint8_t chip_id;
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esp_err_t res = i2c_read_reg(device->i2c_bus, device->i2c_address, BME680_REG_CHIP_ID, &chip_id, 1);
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if (res != ESP_OK) return res;
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if (chip_id != BME680_CHIP_ID) {
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ESP_LOGE(TAG, "Unexpected chip id value 0x%02X, expected 0x%02X", chip_id, BME680_CHIP_ID);
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return ESP_FAIL;
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}
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return ESP_OK;
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}
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esp_err_t bme680_reset(BME680* device) {
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uint8_t value = 0xFF;
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esp_err_t res = i2c_write_reg_n(device->i2c_bus, device->i2c_address, BME680_REG_RESET, &value, 1);
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if (res != ESP_OK) return res;
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return ESP_OK;
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}
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esp_err_t bme680_init(BME680* device) {
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esp_err_t res = bme680_reset(device);
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if (res != ESP_OK) return res;
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vTaskDelay(100 / portTICK_PERIOD_MS);
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res = bme680_check_id(device);
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if (res != ESP_OK) return res;
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return res;
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}
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esp_err_t bme680_deinit(BME680* device) {
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return bme680_reset(device);
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}
|
|
@ -1,19 +0,0 @@
|
|||
#pragma once
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#include <esp_err.h>
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#include <stdint.h>
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#define BME680_REG_RESET 0xE0
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#define BME680_REG_CHIP_ID 0xD0
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#define BME680_CHIP_ID 0x61
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typedef struct BME680 {
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int i2c_bus;
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int i2c_address;
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} BME680;
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esp_err_t bme680_init(BME680* device);
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esp_err_t bme680_deinit(BME680* device);
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esp_err_t bme680_check_id(BME680* device);
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esp_err_t bme680_reset(BME680* device);
|
|
@ -1 +1 @@
|
|||
Subproject commit 000a77e82a039448139a28a9ebff931633f2153b
|
||||
Subproject commit 6c52515af1ccf1828d653ac2f88764837b70f68b
|
|
@ -1 +0,0 @@
|
|||
Subproject commit e45054f56106b528b1e49d34b54ae892ee3c1e1e
|
2
esp-idf
2
esp-idf
|
@ -1 +1 @@
|
|||
Subproject commit 9f303290d8cb77c932efdaed889ce67ff58b6dea
|
||||
Subproject commit 1329b19fe494500aeb79d19b27cfd99b40c37aec
|
BIN
partitions.ods
BIN
partitions.ods
Binary file not shown.
241
sdkconfig
241
sdkconfig
|
@ -2,142 +2,8 @@
|
|||
# Automatically generated file. DO NOT EDIT.
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||||
# Espressif IoT Development Framework (ESP-IDF) Project Configuration
|
||||
#
|
||||
CONFIG_SOC_BROWNOUT_RESET_SUPPORTED="Not determined"
|
||||
CONFIG_SOC_TWAI_BRP_DIV_SUPPORTED="Not determined"
|
||||
CONFIG_SOC_CAPS_ECO_VER_MAX=3
|
||||
CONFIG_SOC_ADC_SUPPORTED=y
|
||||
CONFIG_SOC_DAC_SUPPORTED=y
|
||||
CONFIG_SOC_MCPWM_SUPPORTED=y
|
||||
CONFIG_SOC_SDMMC_HOST_SUPPORTED=y
|
||||
CONFIG_SOC_BT_SUPPORTED=y
|
||||
CONFIG_SOC_CLASSIC_BT_SUPPORTED=y
|
||||
CONFIG_SOC_PCNT_SUPPORTED=y
|
||||
CONFIG_SOC_WIFI_SUPPORTED=y
|
||||
CONFIG_SOC_SDIO_SLAVE_SUPPORTED=y
|
||||
CONFIG_SOC_TWAI_SUPPORTED=y
|
||||
CONFIG_SOC_EMAC_SUPPORTED=y
|
||||
CONFIG_SOC_CPU_CORES_NUM=2
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||||
CONFIG_SOC_ULP_SUPPORTED=y
|
||||
CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y
|
||||
CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=y
|
||||
CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y
|
||||
CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y
|
||||
CONFIG_SOC_I2S_SUPPORTED=y
|
||||
CONFIG_SOC_RMT_SUPPORTED=y
|
||||
CONFIG_SOC_SIGMADELTA_SUPPORTED=y
|
||||
CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y
|
||||
CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y
|
||||
CONFIG_SOC_ADC_PERIPH_NUM=2
|
||||
CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10
|
||||
CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2
|
||||
CONFIG_SOC_ADC_PATT_LEN_MAX=16
|
||||
CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=9
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||||
CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12
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||||
CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=2
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||||
CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=2000
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||||
CONFIG_SOC_ADC_MAX_BITWIDTH=12
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||||
CONFIG_SOC_CPU_BREAKPOINTS_NUM=2
|
||||
CONFIG_SOC_CPU_WATCHPOINTS_NUM=2
|
||||
CONFIG_SOC_CPU_WATCHPOINT_SIZE=64
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||||
CONFIG_SOC_CPU_HAS_FPU=y
|
||||
CONFIG_SOC_DAC_PERIPH_NUM=2
|
||||
CONFIG_SOC_DAC_RESOLUTION=8
|
||||
CONFIG_SOC_GPIO_PORT=1
|
||||
CONFIG_SOC_GPIO_PIN_COUNT=40
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||||
CONFIG_SOC_GPIO_VALID_GPIO_MASK=0xFFFFFFFFFF
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||||
CONFIG_SOC_GPIO_SUPPORT_SLP_SWITCH=y
|
||||
CONFIG_SOC_I2C_NUM=2
|
||||
CONFIG_SOC_I2C_FIFO_LEN=32
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||||
CONFIG_SOC_I2C_SUPPORT_APB=y
|
||||
CONFIG_SOC_CLK_APLL_SUPPORTED=y
|
||||
CONFIG_SOC_APLL_MULTIPLIER_OUT_MIN_HZ=350000000
|
||||
CONFIG_SOC_APLL_MULTIPLIER_OUT_MAX_HZ=500000000
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||||
CONFIG_SOC_APLL_MIN_HZ=5303031
|
||||
CONFIG_SOC_APLL_MAX_HZ=125000000
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||||
CONFIG_SOC_I2S_NUM=2
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||||
CONFIG_SOC_I2S_SUPPORTS_APLL=y
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||||
CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y
|
||||
CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y
|
||||
CONFIG_SOC_I2S_SUPPORTS_ADC=y
|
||||
CONFIG_SOC_I2S_SUPPORTS_DAC=y
|
||||
CONFIG_SOC_I2S_TRANS_SIZE_ALIGN_WORD=y
|
||||
CONFIG_SOC_I2S_LCD_I80_VARIANT=y
|
||||
CONFIG_SOC_LCD_I80_SUPPORTED=y
|
||||
CONFIG_SOC_LCD_I80_BUSES=y
|
||||
CONFIG_SOC_LCD_I80_BUS_WIDTH=24
|
||||
CONFIG_SOC_LEDC_HAS_TIMER_SPECIFIC_MUX=y
|
||||
CONFIG_SOC_LEDC_SUPPORT_REF_TICK=y
|
||||
CONFIG_SOC_LEDC_SUPPORT_HS_MODE=y
|
||||
CONFIG_SOC_LEDC_CHANNEL_NUM=8
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||||
CONFIG_SOC_LEDC_TIMER_BIT_WIDE_NUM=20
|
||||
CONFIG_SOC_MCPWM_GROUPS=2
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||||
CONFIG_SOC_MCPWM_TIMERS_PER_GROUP=3
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||||
CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP=3
|
||||
CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR=2
|
||||
CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR=2
|
||||
CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR=2
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||||
CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP=3
|
||||
CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP=y
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||||
CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER=3
|
||||
CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP=3
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||||
CONFIG_SOC_MCPWM_BASE_CLK_HZ=160000000
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||||
CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000
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||||
CONFIG_SOC_MPU_REGIONS_MAX_NUM=8
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||||
CONFIG_SOC_PCNT_GROUPS=1
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CONFIG_SOC_PCNT_UNITS_PER_GROUP=8
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CONFIG_SOC_PCNT_CHANNELS_PER_UNIT=2
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||||
CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT=2
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||||
CONFIG_SOC_RMT_GROUPS=1
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CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=8
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CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=8
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CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8
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CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=64
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||||
CONFIG_SOC_RMT_SUPPORT_REF_TICK=y
|
||||
CONFIG_SOC_RMT_CHANNEL_CLK_INDEPENDENT=y
|
||||
CONFIG_SOC_RTCIO_PIN_COUNT=18
|
||||
CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y
|
||||
CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y
|
||||
CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y
|
||||
CONFIG_SOC_SIGMADELTA_NUM=1
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||||
CONFIG_SOC_SIGMADELTA_CHANNEL_NUM=8
|
||||
CONFIG_SOC_SPI_PERIPH_NUM=3
|
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CONFIG_SOC_SPI_DMA_CHAN_NUM=2
|
||||
CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64
|
||||
CONFIG_SOC_SPI_MAX_PRE_DIVIDER=8192
|
||||
CONFIG_SOC_SPI_SUPPORT_AS_CS=y
|
||||
CONFIG_SOC_TIMER_GROUPS=2
|
||||
CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=2
|
||||
CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=64
|
||||
CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=4
|
||||
CONFIG_SOC_TOUCH_VERSION_1=y
|
||||
CONFIG_SOC_TOUCH_SENSOR_NUM=10
|
||||
CONFIG_SOC_TOUCH_PAD_MEASURE_WAIT_MAX=0xFF
|
||||
CONFIG_SOC_TWAI_BRP_MIN=2
|
||||
CONFIG_SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT=y
|
||||
CONFIG_SOC_UART_NUM=3
|
||||
CONFIG_SOC_UART_SUPPORT_REF_TICK=y
|
||||
CONFIG_SOC_UART_FIFO_LEN=128
|
||||
CONFIG_SOC_UART_BITRATE_MAX=5000000
|
||||
CONFIG_SOC_SPIRAM_SUPPORTED=y
|
||||
CONFIG_SOC_SHA_SUPPORT_PARALLEL_ENG=y
|
||||
CONFIG_SOC_SHA_SUPPORT_SHA1=y
|
||||
CONFIG_SOC_SHA_SUPPORT_SHA256=y
|
||||
CONFIG_SOC_SHA_SUPPORT_SHA384=y
|
||||
CONFIG_SOC_SHA_SUPPORT_SHA512=y
|
||||
CONFIG_SOC_RSA_MAX_BIT_LEN=4096
|
||||
CONFIG_SOC_AES_SUPPORT_AES_128=y
|
||||
CONFIG_SOC_AES_SUPPORT_AES_192=y
|
||||
CONFIG_SOC_AES_SUPPORT_AES_256=y
|
||||
CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=32
|
||||
CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21
|
||||
CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y
|
||||
CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y
|
||||
CONFIG_SOC_SDMMC_USE_IOMUX=y
|
||||
CONFIG_SOC_SDMMC_NUM_SLOTS=2
|
||||
CONFIG_SOC_BLE_DONT_UPDATE_OWN_RPA=y
|
||||
CONFIG_IDF_CMAKE=y
|
||||
CONFIG_IDF_TARGET_ARCH_XTENSA=y
|
||||
CONFIG_IDF_TARGET_ARCH="xtensa"
|
||||
CONFIG_IDF_TARGET="esp32"
|
||||
CONFIG_IDF_TARGET_ESP32=y
|
||||
CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
|
||||
|
@ -157,7 +23,6 @@ CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y
|
|||
CONFIG_APP_BUILD_GENERATE_BINARIES=y
|
||||
CONFIG_APP_BUILD_BOOTLOADER=y
|
||||
CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
|
||||
# CONFIG_APP_REPRODUCIBLE_BUILD is not set
|
||||
# end of Build type
|
||||
|
||||
#
|
||||
|
@ -179,12 +44,12 @@ CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
|
|||
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set
|
||||
# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set
|
||||
# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set
|
||||
# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set
|
||||
CONFIG_BOOTLOADER_LOG_LEVEL_ERROR=y
|
||||
# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set
|
||||
CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y
|
||||
# CONFIG_BOOTLOADER_LOG_LEVEL_INFO is not set
|
||||
# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set
|
||||
# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set
|
||||
CONFIG_BOOTLOADER_LOG_LEVEL=3
|
||||
CONFIG_BOOTLOADER_LOG_LEVEL=1
|
||||
# CONFIG_BOOTLOADER_SPI_CUSTOM_WP_PIN is not set
|
||||
CONFIG_BOOTLOADER_SPI_WP_PIN=7
|
||||
CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
|
||||
|
@ -211,14 +76,10 @@ CONFIG_SECURE_BOOT_SUPPORTS_RSA=y
|
|||
# CONFIG_SECURE_FLASH_ENC_ENABLED is not set
|
||||
# end of Security features
|
||||
|
||||
CONFIG_ESP_ROM_HAS_CRC_LE=y
|
||||
CONFIG_ESP_ROM_HAS_CRC_BE=y
|
||||
CONFIG_ESP_ROM_HAS_JPEG_DECODE=y
|
||||
CONFIG_ESP_ROM_SUPPORT_MULTIPLE_UART=y
|
||||
|
||||
#
|
||||
# Serial flasher config
|
||||
#
|
||||
CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
|
||||
# CONFIG_ESPTOOLPY_NO_STUB is not set
|
||||
CONFIG_ESPTOOLPY_FLASHMODE_QIO=y
|
||||
# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set
|
||||
|
@ -368,6 +229,12 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
|
|||
# CONFIG_UART_ISR_IN_IRAM is not set
|
||||
# end of UART configuration
|
||||
|
||||
#
|
||||
# RTCIO configuration
|
||||
#
|
||||
# CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC is not set
|
||||
# end of RTCIO configuration
|
||||
|
||||
#
|
||||
# GPIO Configuration
|
||||
#
|
||||
|
@ -380,14 +247,6 @@ CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
|
|||
# CONFIG_GDMA_CTRL_FUNC_IN_IRAM is not set
|
||||
# CONFIG_GDMA_ISR_IRAM_SAFE is not set
|
||||
# end of GDMA Configuration
|
||||
|
||||
#
|
||||
# GPTimer Configuration
|
||||
#
|
||||
# CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM is not set
|
||||
# CONFIG_GPTIMER_ISR_IRAM_SAFE is not set
|
||||
# CONFIG_GPTIMER_SUPPRESS_DEPRECATE_WARN is not set
|
||||
# end of GPTimer Configuration
|
||||
# end of Driver configurations
|
||||
|
||||
#
|
||||
|
@ -488,8 +347,8 @@ CONFIG_PICO_PSRAM_CS_IO=10
|
|||
|
||||
# CONFIG_ESP32_TRAX is not set
|
||||
CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
|
||||
# CONFIG_ESP32_ULP_COPROC_ENABLED is not set
|
||||
CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0
|
||||
CONFIG_ESP32_ULP_COPROC_ENABLED=y
|
||||
CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=512
|
||||
CONFIG_ESP32_DEBUG_OCDAWARE=y
|
||||
CONFIG_ESP32_BROWNOUT_DET=y
|
||||
CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
|
||||
|
@ -620,6 +479,14 @@ CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
|
|||
# end of RTC Clock Config
|
||||
# end of Hardware Settings
|
||||
|
||||
#
|
||||
# IPC (Inter-Processor Call)
|
||||
#
|
||||
CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
|
||||
CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y
|
||||
CONFIG_ESP_IPC_ISR_ENABLE=y
|
||||
# end of IPC (Inter-Processor Call)
|
||||
|
||||
#
|
||||
# LCD and Touch Panel
|
||||
#
|
||||
|
@ -638,7 +505,6 @@ CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120
|
|||
CONFIG_ESP_NETIF_TCPIP_LWIP=y
|
||||
# CONFIG_ESP_NETIF_LOOPBACK is not set
|
||||
CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y
|
||||
# CONFIG_ESP_NETIF_L2_TAP is not set
|
||||
# end of ESP NETIF Adapter
|
||||
|
||||
#
|
||||
|
@ -702,14 +568,6 @@ CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y
|
|||
CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
|
||||
# end of ESP System Settings
|
||||
|
||||
#
|
||||
# IPC (Inter-Processor Call)
|
||||
#
|
||||
CONFIG_ESP_IPC_TASK_STACK_SIZE=1024
|
||||
CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y
|
||||
CONFIG_ESP_IPC_ISR_ENABLE=y
|
||||
# end of IPC (Inter-Processor Call)
|
||||
|
||||
#
|
||||
# High resolution timer (esp_timer)
|
||||
#
|
||||
|
@ -764,7 +622,6 @@ CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y
|
|||
#
|
||||
# FAT Filesystem support
|
||||
#
|
||||
CONFIG_FATFS_VOLUME_COUNT=2
|
||||
# CONFIG_FATFS_CODEPAGE_DYNAMIC is not set
|
||||
CONFIG_FATFS_CODEPAGE_437=y
|
||||
# CONFIG_FATFS_CODEPAGE_720 is not set
|
||||
|
@ -830,7 +687,11 @@ CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
|
|||
CONFIG_FMB_CONTROLLER_STACK_SIZE=4096
|
||||
CONFIG_FMB_EVENT_QUEUE_TIMEOUT=20
|
||||
# CONFIG_FMB_TIMER_PORT_ENABLED is not set
|
||||
# CONFIG_FMB_TIMER_USE_ISR_DISPATCH_METHOD is not set
|
||||
CONFIG_FMB_TIMER_GROUP=0
|
||||
CONFIG_FMB_TIMER_INDEX=0
|
||||
CONFIG_FMB_MASTER_TIMER_GROUP=0
|
||||
CONFIG_FMB_MASTER_TIMER_INDEX=0
|
||||
# CONFIG_FMB_TIMER_ISR_IN_IRAM is not set
|
||||
# end of Modbus configuration
|
||||
|
||||
#
|
||||
|
@ -850,6 +711,9 @@ CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
|
|||
# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set
|
||||
CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y
|
||||
CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1
|
||||
CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
|
||||
# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set
|
||||
# CONFIG_FREERTOS_ASSERT_DISABLE is not set
|
||||
CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536
|
||||
CONFIG_FREERTOS_ISR_STACKSIZE=1536
|
||||
# CONFIG_FREERTOS_LEGACY_HOOKS is not set
|
||||
|
@ -894,6 +758,18 @@ CONFIG_HEAP_TRACING_OFF=y
|
|||
# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set
|
||||
# end of Heap memory debugging
|
||||
|
||||
#
|
||||
# jsmn
|
||||
#
|
||||
# CONFIG_JSMN_PARENT_LINKS is not set
|
||||
# CONFIG_JSMN_STRICT is not set
|
||||
# end of jsmn
|
||||
|
||||
#
|
||||
# libsodium
|
||||
#
|
||||
# end of libsodium
|
||||
|
||||
#
|
||||
# Log output
|
||||
#
|
||||
|
@ -1068,14 +944,19 @@ CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
|
|||
# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set
|
||||
# CONFIG_MBEDTLS_DEBUG is not set
|
||||
|
||||
#
|
||||
# mbedTLS v2.28.x related
|
||||
#
|
||||
# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set
|
||||
# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set
|
||||
# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set
|
||||
CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE=y
|
||||
# end of mbedTLS v2.28.x related
|
||||
|
||||
#
|
||||
# Certificate Bundle
|
||||
#
|
||||
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y
|
||||
CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
|
||||
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set
|
||||
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set
|
||||
# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set
|
||||
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE is not set
|
||||
# end of Certificate Bundle
|
||||
|
||||
# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set
|
||||
|
@ -1103,6 +984,7 @@ CONFIG_MBEDTLS_TLS_ENABLED=y
|
|||
#
|
||||
# CONFIG_MBEDTLS_PSK_MODES is not set
|
||||
CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y
|
||||
CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y
|
||||
CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y
|
||||
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y
|
||||
CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y
|
||||
|
@ -1151,7 +1033,6 @@ CONFIG_MBEDTLS_X509_CSR_PARSE_C=y
|
|||
# end of Certificates
|
||||
|
||||
CONFIG_MBEDTLS_ECP_C=y
|
||||
# CONFIG_MBEDTLS_DHM_C is not set
|
||||
CONFIG_MBEDTLS_ECDH_C=y
|
||||
CONFIG_MBEDTLS_ECDSA_C=y
|
||||
# CONFIG_MBEDTLS_ECJPAKE_C is not set
|
||||
|
@ -1392,15 +1273,21 @@ CONFIG_WPA_MBEDTLS_CRYPTO=y
|
|||
# end of Supplicant
|
||||
# end of Component config
|
||||
|
||||
#
|
||||
# Compatibility options
|
||||
#
|
||||
# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set
|
||||
# end of Compatibility options
|
||||
|
||||
# Deprecated options for backward compatibility
|
||||
CONFIG_TOOLPREFIX="xtensa-esp32-elf-"
|
||||
# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set
|
||||
# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set
|
||||
CONFIG_LOG_BOOTLOADER_LEVEL_ERROR=y
|
||||
# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set
|
||||
CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y
|
||||
# CONFIG_LOG_BOOTLOADER_LEVEL_INFO is not set
|
||||
# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set
|
||||
# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set
|
||||
CONFIG_LOG_BOOTLOADER_LEVEL=3
|
||||
CONFIG_LOG_BOOTLOADER_LEVEL=1
|
||||
# CONFIG_APP_ROLLBACK_ENABLE is not set
|
||||
# CONFIG_FLASH_ENCRYPTION_ENABLED is not set
|
||||
CONFIG_FLASHMODE_QIO=y
|
||||
|
@ -1436,8 +1323,8 @@ CONFIG_ADC2_DISABLE_DAC=y
|
|||
CONFIG_SPIRAM_SUPPORT=y
|
||||
# CONFIG_WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST is not set
|
||||
CONFIG_TRACEMEM_RESERVE_DRAM=0x0
|
||||
# CONFIG_ULP_COPROC_ENABLED is not set
|
||||
CONFIG_ULP_COPROC_RESERVE_MEM=0
|
||||
CONFIG_ULP_COPROC_ENABLED=y
|
||||
CONFIG_ULP_COPROC_RESERVE_MEM=512
|
||||
CONFIG_BROWNOUT_DET=y
|
||||
CONFIG_BROWNOUT_DET_LVL_SEL_0=y
|
||||
# CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set
|
||||
|
@ -1462,6 +1349,7 @@ CONFIG_POST_EVENTS_FROM_IRAM_ISR=y
|
|||
CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y
|
||||
CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4
|
||||
# CONFIG_ESP32C3_LIGHTSLEEP_GPIO_RESET_WORKAROUND is not set
|
||||
CONFIG_IPC_TASK_STACK_SIZE=1024
|
||||
CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y
|
||||
CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION=y
|
||||
CONFIG_ESP32_PHY_DEFAULT_INIT_IF_INVALID=y
|
||||
|
@ -1491,7 +1379,6 @@ CONFIG_TASK_WDT_TIMEOUT_S=5
|
|||
CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y
|
||||
CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y
|
||||
# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set
|
||||
CONFIG_IPC_TASK_STACK_SIZE=1024
|
||||
CONFIG_TIMER_TASK_STACK_SIZE=3584
|
||||
# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set
|
||||
# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set
|
||||
|
@ -1509,6 +1396,8 @@ CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20
|
|||
CONFIG_MB_CONTROLLER_STACK_SIZE=4096
|
||||
CONFIG_MB_EVENT_QUEUE_TIMEOUT=20
|
||||
# CONFIG_MB_TIMER_PORT_ENABLED is not set
|
||||
CONFIG_MB_TIMER_GROUP=0
|
||||
CONFIG_MB_TIMER_INDEX=0
|
||||
# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set
|
||||
CONFIG_TIMER_TASK_PRIORITY=1
|
||||
CONFIG_TIMER_TASK_STACK_DEPTH=2048
|
||||
|
|
Loading…
Reference in a new issue