mirror of
https://gitlab.freedesktop.org/gstreamer/gstreamer.git
synced 2024-11-26 11:41:09 +00:00
23540ccc52
Original commit message from CVS: Faster and modular getbits implementation. Fixed a bug in the audiosink that could lock up your box on bad MB. Modified the plugins to use the new getbits functions.
115 lines
1.9 KiB
ArmAsm
115 lines
1.9 KiB
ArmAsm
.p2align 4,,7
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.globl _gst_getbits_i386
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.type _gst_getbits_i386,@function
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_gst_getbits_i386:
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cmpl $0,8(%esp)
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jne .L39
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xorl %eax,%eax
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ret
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.L39:
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movl 4(%esp),%edx
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movl (%edx),%ecx
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movl (%ecx),%eax
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bswap %eax
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movl 16(%edx),%ecx
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shll %cl, %eax
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movl 8(%esp),%ecx
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addl %ecx, 16(%edx)
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negl %ecx
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addl $32,%ecx
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shrl %cl, %eax
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movl 16(%edx),%ecx
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sarl $3,%ecx
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addl %ecx,(%edx)
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andl $7,16(%edx)
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ret
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.p2align 4,,7
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.globl _gst_getbits_fast_i386
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.type _gst_getbits_fast_i386,@function
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_gst_getbits_fast_i386:
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movl 4(%esp),%edx
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movl (%edx),%ecx
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movzbl 1(%ecx),%eax
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movb (%ecx), %ah
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movl 16(%edx),%ecx
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shlw %cl, %ax
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movl 8(%esp),%ecx
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addl %ecx, 16(%edx)
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negl %ecx
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addl $16,%ecx
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shrl %cl, %eax
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movl 16(%edx),%ecx
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sarl $3,%ecx
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addl %ecx,(%edx)
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andl $7,16(%edx)
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ret
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.p2align 4,,7
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.globl _gst_get1bit_i386
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.type _gst_get1bit_i386,@function
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_gst_get1bit_i386:
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movl 4(%esp),%edx
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movl (%edx),%ecx
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movzbl (%ecx),%eax
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movl 16(%edx),%ecx
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incl %ecx
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rolb %cl, %al
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andb $1, %al
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movl %ecx, 16(%edx)
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andl $7,16(%edx)
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sarl $3,%ecx
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addl %ecx,(%edx)
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ret
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.p2align 4,,7
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.globl _gst_showbits_i386
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.type _gst_showbits_i386,@function
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_gst_showbits_i386:
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cmpl $0,8(%esp)
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jne .L40
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xorl %eax,%eax
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ret
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.L40:
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movl 4(%esp),%edx
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movl (%edx),%ecx
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movl (%ecx), %eax
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bswap %eax
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movl 16(%edx),%ecx
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shll %cl, %eax
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movl 8(%esp),%ecx
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negl %ecx
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addl $32,%ecx
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shrl %cl, %eax
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ret
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.p2align 4,,7
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.globl _gst_flushbits_i386
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.type _gst_flushbits_i386,@function
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_gst_flushbits_i386:
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movl 4(%esp),%ecx
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movl 16(%ecx),%eax
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addl 8(%esp),%eax
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movl %eax, %edx
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sarl $3,%eax
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addl %eax,(%ecx)
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andl $7, %edx
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movl %edx, 16(%ecx)
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ret
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.p2align 4,,7
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.globl _gst_getbits_back_i386
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.type _gst_getbits_back_i386,@function
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_gst_getbits_back_i386:
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movl 4(%esp),%edx
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movl 16(%edx),%ecx
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subl 8(%esp),%ecx
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movl %ecx, %eax
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sarl $3,%ecx
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addl %ecx,(%edx)
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andl $7,%eax
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movl %eax, 16(%edx)
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ret
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