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gst/: Remove old file.
Original commit message from CVS: * gst/Makefile.am: * gst/gstarch.h: Remove old file.
This commit is contained in:
Wim Taymans
parent
5ebba480f0
commit
fba0bf771b
3 changed files with 7 additions and 206 deletions
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@ -1,3 +1,9 @@
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2005-07-18 Wim Taymans <wim@fluendo.com>
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* gst/Makefile.am:
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* gst/gstarch.h:
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Remove old file.
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2005-07-18 Wim Taymans <wim@fluendo.com>
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* gst/Makefile.am:
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@ -206,8 +206,7 @@ noinst_HEADERS = \
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gettext.h \
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gst-i18n-lib.h \
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gst-i18n-app.h \
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gst_private.h \
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gstarch.h
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gst_private.h
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gstmarshal.h: gstmarshal.list
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glib-genmarshal --header --prefix=gst_marshal $(srcdir)/gstmarshal.list > gstmarshal.h.tmp
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204
gst/gstarch.h
204
gst/gstarch.h
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@ -1,204 +0,0 @@
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/* GStreamer
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* Copyright (C) 1999,2000 Erik Walthinsen <omega@cse.ogi.edu>
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* 2000 Wim Taymans <wtay@chello.be>
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*
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* gstarch.h: Architecture-specific inclusions
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Library General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Library General Public License for more details.
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*
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* You should have received a copy of the GNU Library General Public
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* License along with this library; if not, write to the
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* Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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* Boston, MA 02111-1307, USA.
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*/
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#ifndef __GST_GSTARCH_H__
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#define __GST_GSTARCH_H__
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#ifdef HAVE_CONFIG_H
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#include "config.h"
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#endif
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/***** Intel x86 *****/
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#if defined(HAVE_CPU_I386) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__( "movl %0, %%esp\n" : : "r"(stackpointer) );
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#define GST_ARCH_CALL(target) \
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__asm__("call *%0" : : "r"(target) );
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/* assuming the stackframe is 16 bytes */
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#define GST_ARCH_SETUP_STACK(sp) sp -= 4
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/***** PowerPC *****/
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#elif defined (HAVE_CPU_PPC) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__("lwz r1,%0" : : "m"(stackpointer))
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#define GST_ARCH_CALL(target) \
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__asm__( "mr r0,%0\n\t" \
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"mtlr r0\n\t" \
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"blrl" : : "r"(target) );
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struct minimal_ppc_stackframe {
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unsigned long back_chain;
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unsigned long LR_save;
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unsigned long unused1;
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unsigned long unused2;
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};
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#define GST_ARCH_SETUP_STACK(sp) \
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sp = ((unsigned long *)(sp)) - 4; \
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((struct minimal_ppc_stackframe *)sp)->back_chain = 0;
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/***** DEC[/Compaq/HP?/Intel?] Alpha *****/
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#elif defined(HAVE_CPU_ALPHA) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__("bis $31,%0,$30" : : "r"(stackpointer));
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#define GST_ARCH_CALL(target) \
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__asm__( "bis $31,%0,$27\n\t" \
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"jsr $26,($27),0" : : "r"(target) );
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/* Need to get more information about the stackframe format
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* and get the fields more correct. Check GDB sources maybe?
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*/
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struct minimal_stackframe {
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unsigned long back_chain;
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unsigned long LR_save;
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unsigned long unused1;
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unsigned long unused2;
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};
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#define GST_ARCH_SETUP_STACK(sp) \
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sp = ((unsigned long *)(sp)) - 4; \
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((struct minimal_stackframe *)sp)->back_chain = 0;
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/***** ARM *****/
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#elif defined(HAVE_CPU_ARM) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__( "mov sp, %0" : : "r"(stackpointer));
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#define GST_ARCH_CALL(target) \
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__asm__( "mov pc, %0" : : "r"(target) );
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/* Need to get more information about the stackframe format
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* and get the fields more correct. Check GDB sources maybe?
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*/
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#define GST_ARCH_SETUP_STACK(sp) sp -= 4
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/***** Sun SPARC *****/
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#elif defined(HAVE_CPU_SPARC) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__( "ta 3\n\t" \
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"mov %0, %%sp" : : "r"(stackpointer));
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#define GST_ARCH_CALL(target) \
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__asm__( "call %0,0\n\t" \
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"nop" : : "r"(target) );
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#define GST_ARCH_PRESETJMP() \
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__asm__( "ta 3" );
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/* Need to get more information about the stackframe format
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* and get the fields more correct. Check GDB sources maybe?
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*/
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#define GST_ARCH_SETUP_STACK(sp) sp -= 4
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/***** MIPS *****/
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#elif defined(HAVE_CPU_MIPS) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__("lw $sp,0(%0)\n\t" : : "r"(stackpointer));
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#define GST_ARCH_CALL(target) \
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__asm__("lw $25,0(%0)\n\t" /* call via $25 */ \
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"jal $25\n\t" : : "r"(target));
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/* assuming the stackframe is 16 bytes */
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#define GST_ARCH_SETUP_STACK(sp) sp -= 4
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/***** HP-PA *****/
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#elif defined(HAVE_CPU_HPPA) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__("copy %0,%%sp\n\t" : : "r"(stackpointer));
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#define GST_ARCH_CALL(target) \
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__asm__("copy %0,%%r22\n\t" /* set call address */ \
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".CALL\n\t" /* call pseudo insn (why?) */ \
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"bl $$dyncall,%%r31\n\t" : : "r"(target));
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/* assume stackframe is 16 bytes */
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#define GST_ARCH_SETUP_STACK(sp) sp -= 4
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/***** S/390 *****/
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#elif defined(HAVE_CPU_S390) && defined(__GNUC__)
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__("lr 15,%0" : : "r"(stackpointer))
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#define GST_ARCH_CALL(target) \
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__asm__( "basr 14,%0" : : "a"(target) );
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struct minimal_s390_stackframe {
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unsigned long back_chain;
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unsigned long reserved;
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unsigned long greg[14];
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double freg[4];
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};
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#define GST_ARCH_SETUP_STACK(sp) \
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sp = ((unsigned long *)(sp)) - 24; \
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((struct minimal_s390_stackframe *)sp)->back_chain = 0;
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/***** M68K *****/
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#elif defined(HAVE_CPU_M68K) && defined(__GNUC__)
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/* From Matthias Urlichs <smurf@smurf.noris.de> */
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#define GST_ARCH_SET_SP(stackpointer) \
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__asm__( "move.l %0, %%sp\n" : : "r" (stackpointer))
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#define GST_ARCH_CALL(target) \
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__asm__( "jbsr (%0)" : : "r" (target))
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#define GST_ARCH_SETUP_STACK(sp) sp -= 4
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#elif defined(HAVE_MAKECONTEXT)
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/* If we have makecontext(), we'll be using that. */
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#define USE_MAKECONTEXT 1
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#else
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#error Need to know about this architecture, or have a generic implementation
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#endif
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#endif /* __GST_GSTARCH_H__ */
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