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Fix _second_ sparc asm. Who would have guessed there would be two?
Original commit message from CVS: Fix _second_ sparc asm. Who would have guessed there would be two?
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1 changed files with 14 additions and 0 deletions
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@ -294,6 +294,7 @@ gst_atomic_int_dec_and_test (GstAtomicInt *aint)
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ptr = &aint->counter;
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#if __GNUC__ > 3 || (__GNUC__ >=3 && __GNUC_MINOR__ >= 2)
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__asm__ __volatile__("1: ldstub [%[ptr] + 3], %[lock]\n"
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"\torcc %[lock], 0, %%g0\n"
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"\tbne 1b\n" /* go back until we have the lock */
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@ -305,6 +306,19 @@ gst_atomic_int_dec_and_test (GstAtomicInt *aint)
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: [inc] "=&r" (increment), [lock] "=r" (lock)
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: "0" (increment), [ptr] "r" (ptr)
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);
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#else
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__asm__ __volatile__("1: ldstub [%3 + 3], %1\n"
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"\torcc %1, 0, %%g0\n"
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"\tbne 1b\n" /* go back until we have the lock */
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"\tld [%3], %0\n"
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"\tsra %0, 8, %0\n"
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"\tsub %0, 1, %0\n"
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"\tsll %0, 8, %1\n"
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"\tst %1,[%3]\n" /* Release the lock */
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: "=&r" (increment), "=r" (lock)
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: "0" (increment), "r" (ptr)
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);
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#endif
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return increment == 0;
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}
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