Fix _second_ sparc asm. Who would have guessed there would be two?

Original commit message from CVS:
Fix _second_ sparc asm.  Who would have guessed there would be two?
This commit is contained in:
David Schleef 2003-05-19 21:45:37 +00:00
parent e0859eb74a
commit 23823201b3

View file

@ -294,6 +294,7 @@ gst_atomic_int_dec_and_test (GstAtomicInt *aint)
ptr = &aint->counter;
#if __GNUC__ > 3 || (__GNUC__ >=3 && __GNUC_MINOR__ >= 2)
__asm__ __volatile__("1: ldstub [%[ptr] + 3], %[lock]\n"
"\torcc %[lock], 0, %%g0\n"
"\tbne 1b\n" /* go back until we have the lock */
@ -305,6 +306,19 @@ gst_atomic_int_dec_and_test (GstAtomicInt *aint)
: [inc] "=&r" (increment), [lock] "=r" (lock)
: "0" (increment), [ptr] "r" (ptr)
);
#else
__asm__ __volatile__("1: ldstub [%3 + 3], %1\n"
"\torcc %1, 0, %%g0\n"
"\tbne 1b\n" /* go back until we have the lock */
"\tld [%3], %0\n"
"\tsra %0, 8, %0\n"
"\tsub %0, 1, %0\n"
"\tsll %0, 8, %1\n"
"\tst %1,[%3]\n" /* Release the lock */
: "=&r" (increment), "=r" (lock)
: "0" (increment), "r" (ptr)
);
#endif
return increment == 0;
}