mirror of
https://gitlab.freedesktop.org/gstreamer/gstreamer.git
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211 lines
6.4 KiB
C
211 lines
6.4 KiB
C
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* These are the H.264 state controls for use with stateless H.264
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* codec drivers.
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*
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* It turns out that these structs are not stable yet and will undergo
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* more changes. So keep them private until they are stable and ready to
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* become part of the official public API.
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*/
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#ifndef _H264_CTRLS_H_
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#define _H264_CTRLS_H_
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#include "linux/videodev2.h"
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/* Our pixel format isn't stable at the moment */
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#define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */
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/*
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* This is put insanely high to avoid conflicting with controls that
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* would be added during the phase where those controls are not
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* stable. It should be fixed eventually.
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*/
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#define V4L2_CID_MPEG_VIDEO_H264_SPS (V4L2_CID_MPEG_BASE+1000)
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#define V4L2_CID_MPEG_VIDEO_H264_PPS (V4L2_CID_MPEG_BASE+1001)
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#define V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX (V4L2_CID_MPEG_BASE+1002)
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#define V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS (V4L2_CID_MPEG_BASE+1003)
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#define V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS (V4L2_CID_MPEG_BASE+1004)
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#define V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE (V4L2_CID_MPEG_BASE+1005)
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#define V4L2_CID_MPEG_VIDEO_H264_START_CODE (V4L2_CID_MPEG_BASE+1006)
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/* enum v4l2_ctrl_type type values */
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#define V4L2_CTRL_TYPE_H264_SPS 0x0110
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#define V4L2_CTRL_TYPE_H264_PPS 0x0111
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#define V4L2_CTRL_TYPE_H264_SCALING_MATRIX 0x0112
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#define V4L2_CTRL_TYPE_H264_SLICE_PARAMS 0x0113
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#define V4L2_CTRL_TYPE_H264_DECODE_PARAMS 0x0114
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enum v4l2_mpeg_video_h264_decode_mode {
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V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED,
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V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED,
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};
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enum v4l2_mpeg_video_h264_start_code {
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V4L2_MPEG_VIDEO_H264_START_CODE_NONE,
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V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B,
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};
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#define V4L2_H264_SPS_CONSTRAINT_SET0_FLAG 0x01
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#define V4L2_H264_SPS_CONSTRAINT_SET1_FLAG 0x02
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#define V4L2_H264_SPS_CONSTRAINT_SET2_FLAG 0x04
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#define V4L2_H264_SPS_CONSTRAINT_SET3_FLAG 0x08
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#define V4L2_H264_SPS_CONSTRAINT_SET4_FLAG 0x10
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#define V4L2_H264_SPS_CONSTRAINT_SET5_FLAG 0x20
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#define V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE 0x01
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#define V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS 0x02
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#define V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO 0x04
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#define V4L2_H264_SPS_FLAG_GAPS_IN_FRAME_NUM_VALUE_ALLOWED 0x08
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#define V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY 0x10
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#define V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD 0x20
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#define V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE 0x40
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struct v4l2_ctrl_h264_sps {
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__u8 profile_idc;
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__u8 constraint_set_flags;
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__u8 level_idc;
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__u8 seq_parameter_set_id;
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__u8 chroma_format_idc;
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__u8 bit_depth_luma_minus8;
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__u8 bit_depth_chroma_minus8;
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__u8 log2_max_frame_num_minus4;
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__u8 pic_order_cnt_type;
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__u8 log2_max_pic_order_cnt_lsb_minus4;
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__u8 max_num_ref_frames;
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__u8 num_ref_frames_in_pic_order_cnt_cycle;
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__s32 offset_for_ref_frame[255];
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__s32 offset_for_non_ref_pic;
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__s32 offset_for_top_to_bottom_field;
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__u16 pic_width_in_mbs_minus1;
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__u16 pic_height_in_map_units_minus1;
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__u32 flags;
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};
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#define V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE 0x0001
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#define V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT 0x0002
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#define V4L2_H264_PPS_FLAG_WEIGHTED_PRED 0x0004
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#define V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT 0x0008
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#define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED 0x0010
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#define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT 0x0020
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#define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE 0x0040
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#define V4L2_H264_PPS_FLAG_PIC_SCALING_MATRIX_PRESENT 0x0080
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struct v4l2_ctrl_h264_pps {
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__u8 pic_parameter_set_id;
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__u8 seq_parameter_set_id;
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__u8 num_slice_groups_minus1;
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__u8 num_ref_idx_l0_default_active_minus1;
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__u8 num_ref_idx_l1_default_active_minus1;
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__u8 weighted_bipred_idc;
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__s8 pic_init_qp_minus26;
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__s8 pic_init_qs_minus26;
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__s8 chroma_qp_index_offset;
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__s8 second_chroma_qp_index_offset;
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__u16 flags;
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};
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struct v4l2_ctrl_h264_scaling_matrix {
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__u8 scaling_list_4x4[6][16];
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__u8 scaling_list_8x8[6][64];
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};
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struct v4l2_h264_weight_factors {
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__s16 luma_weight[32];
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__s16 luma_offset[32];
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__s16 chroma_weight[32][2];
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__s16 chroma_offset[32][2];
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};
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struct v4l2_h264_pred_weight_table {
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__u16 luma_log2_weight_denom;
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__u16 chroma_log2_weight_denom;
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struct v4l2_h264_weight_factors weight_factors[2];
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};
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#define V4L2_H264_SLICE_TYPE_P 0
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#define V4L2_H264_SLICE_TYPE_B 1
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#define V4L2_H264_SLICE_TYPE_I 2
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#define V4L2_H264_SLICE_TYPE_SP 3
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#define V4L2_H264_SLICE_TYPE_SI 4
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#define V4L2_H264_SLICE_FLAG_FIELD_PIC 0x01
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#define V4L2_H264_SLICE_FLAG_BOTTOM_FIELD 0x02
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#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x04
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#define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x08
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struct v4l2_ctrl_h264_slice_params {
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/* Size in bytes, including header */
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__u32 size;
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/* Offset in bytes to the start of slice in the OUTPUT buffer. */
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__u32 start_byte_offset;
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/* Offset in bits to slice_data() from the beginning of this slice. */
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__u32 header_bit_size;
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__u16 first_mb_in_slice;
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__u8 slice_type;
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__u8 pic_parameter_set_id;
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__u8 colour_plane_id;
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__u8 redundant_pic_cnt;
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__u16 frame_num;
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__u16 idr_pic_id;
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__u16 pic_order_cnt_lsb;
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__s32 delta_pic_order_cnt_bottom;
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__s32 delta_pic_order_cnt0;
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__s32 delta_pic_order_cnt1;
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struct v4l2_h264_pred_weight_table pred_weight_table;
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/* Size in bits of dec_ref_pic_marking() syntax element. */
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__u32 dec_ref_pic_marking_bit_size;
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/* Size in bits of pic order count syntax. */
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__u32 pic_order_cnt_bit_size;
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__u8 cabac_init_idc;
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__s8 slice_qp_delta;
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__s8 slice_qs_delta;
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__u8 disable_deblocking_filter_idc;
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__s8 slice_alpha_c0_offset_div2;
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__s8 slice_beta_offset_div2;
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__u8 num_ref_idx_l0_active_minus1;
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__u8 num_ref_idx_l1_active_minus1;
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__u32 slice_group_change_cycle;
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/*
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* Entries on each list are indices into
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* v4l2_ctrl_h264_decode_params.dpb[].
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*/
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__u8 ref_pic_list0[32];
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__u8 ref_pic_list1[32];
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__u32 flags;
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};
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#define V4L2_H264_DPB_ENTRY_FLAG_VALID 0x01
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#define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE 0x02
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#define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM 0x04
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struct v4l2_h264_dpb_entry {
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__u64 reference_ts;
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__u16 frame_num;
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__u16 pic_num;
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/* Note that field is indicated by v4l2_buffer.field */
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__s32 top_field_order_cnt;
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__s32 bottom_field_order_cnt;
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__u32 flags; /* V4L2_H264_DPB_ENTRY_FLAG_* */
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};
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#define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01
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struct v4l2_ctrl_h264_decode_params {
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struct v4l2_h264_dpb_entry dpb[16];
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__u16 num_slices;
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__u16 nal_ref_idc;
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__s32 top_field_order_cnt;
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__s32 bottom_field_order_cnt;
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__u32 flags; /* V4L2_H264_DECODE_PARAM_FLAG_* */
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};
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#endif
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