From ca4e87219c453f0d6faff0a7a17bd50b3f1c8800 Mon Sep 17 00:00:00 2001
From: Erik Walthinsen <omega@temple-baptist.org>
Date: Fri, 2 Mar 2001 18:30:37 +0000
Subject: [PATCH] added sparc cothreads

Original commit message from CVS:
added sparc cothreads
---
 acconfig.h      |  1 +
 configure.in    |  3 +++
 gst/Makefile.am |  1 +
 gst/cothreads.c |  3 +++
 gst/gstarch.h   |  2 ++
 gst/gstsparc.h  | 42 ++++++++++++++++++++++++++++++++++++++++++
 6 files changed, 52 insertions(+)
 create mode 100644 gst/gstsparc.h

diff --git a/acconfig.h b/acconfig.h
index bee8dafad0..b79e6091b6 100644
--- a/acconfig.h
+++ b/acconfig.h
@@ -19,6 +19,7 @@
 #undef HAVE_CPU_PPC
 #undef HAVE_CPU_ALPHA
 #undef HAVE_CPU_ARM
+#undef HAVE_CPU_SPARC
 
 #undef HAVE_GDK_PIXBUF
 #undef HAVE_LIBGHTTP
diff --git a/configure.in b/configure.in
index dd25724c41..b0bb657ffb 100644
--- a/configure.in
+++ b/configure.in
@@ -124,6 +124,8 @@ case "x${target_cpu}" in
              AC_DEFINE(HAVE_CPU_ALPHA) ;;
   xarm*)     HAVE_CPU_ARM=yes ;
              AC_DEFINE(HAVE_CPU_ARM) ;;
+  xsparc*)   HAVE_CPU_SPARC=yes ;
+             AC_DEFINE(HAVE_CPU_SPARC) ;;
 esac
 
 dnl Determine endianness
@@ -564,6 +566,7 @@ AM_CONDITIONAL(HAVE_CPU_I386,       test "x$HAVE_CPU_I386" = "xyes")
 AM_CONDITIONAL(HAVE_CPU_PPC,        test "x$HAVE_CPU_PPC" = "xyes")
 AM_CONDITIONAL(HAVE_CPU_ALPHA,      test "x$HAVE_CPU_ALPHA" = "xyes")
 AM_CONDITIONAL(HAVE_CPU_ARM,        test "x$HAVE_CPU_ARM" = "xyes")
+AM_CONDITIONAL(HAVE_CPU_SPARC       test "x$HAVE_CPU_SPARC" = "xyes")
 AM_CONDITIONAL(HAVE_GDK_PIXBUF,     test "x$USE_GDK_PIXBUF" = "xyes")
 AM_CONDITIONAL(HAVE_LIBGHTTP,       test "x$USE_LIBGHTTP" = "xyes")
 AM_CONDITIONAL(HAVE_LIBMMX,         test "x$USE_LIBMMX" = "xyes")
diff --git a/gst/Makefile.am b/gst/Makefile.am
index 317e4e461c..d25c9f9468 100644
--- a/gst/Makefile.am
+++ b/gst/Makefile.am
@@ -124,6 +124,7 @@ noinst_HEADERS = 	\
 	gstppc.h	\
 	gstalpha.h	\
 	gstarm.h	\
+	gstsparc.h	\
 	gstpropsprivate.h
 
 CFLAGS = $(LIBGST_CFLAGS)
diff --git a/gst/cothreads.c b/gst/cothreads.c
index 8a938f1dff..a2e9aa60e1 100644
--- a/gst/cothreads.c
+++ b/gst/cothreads.c
@@ -268,6 +268,9 @@ cothread_switch (cothread_state *thread)
   ctx->current = thread->threadnum;
 
   /* save the current stack pointer, frame pointer, and pc */
+#ifdef GST_ARCH_PRESETJMP
+  GST_ARCH_PRESETJMP();
+#endif
   enter = setjmp(current->jmp);
   if (enter != 0) {
     GST_DEBUG (0,"enter thread #%d %d %p<->%p (%d)\n",current->threadnum, enter, 
diff --git a/gst/gstarch.h b/gst/gstarch.h
index d3b22161ba..d78e768cf7 100644
--- a/gst/gstarch.h
+++ b/gst/gstarch.h
@@ -35,6 +35,8 @@
 #include "gstalpha.h"
 #elif defined(HAVE_CPU_ARM)
 #include "gstarm.h"
+#elif defined(HAVE_CPU_SPARC)
+#include "gstsparc.h"
 #else
 #error Need to know about this architecture, or have a generic implementation
 #endif
diff --git a/gst/gstsparc.h b/gst/gstsparc.h
new file mode 100644
index 0000000000..8dca391cc9
--- /dev/null
+++ b/gst/gstsparc.h
@@ -0,0 +1,42 @@
+/* GStreamer
+ * Copyright (C) 1999,2000 Erik Walthinsen <omega@cse.ogi.edu>
+ *                    2000 Wim Taymans <wtay@chello.be>
+ *
+ * gstsparc.h: Header for Sparc-specific architecture issues
+ *
+ * This library is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU Library General Public
+ * License as published by the Free Software Foundation; either
+ * version 2 of the License, or (at your option) any later version.
+ *
+ * This library is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * Library General Public License for more details.
+ *
+ * You should have received a copy of the GNU Library General Public
+ * License along with this library; if not, write to the
+ * Free Software Foundation, Inc., 59 Temple Place - Suite 330,
+ * Boston, MA 02111-1307, USA.
+ */
+
+#ifndef __GST_GSTSPARC_H__
+#define __GST_GSTSPARC_H__
+
+#define GST_ARCH_SET_SP(stackpointer) \
+    __asm__( "ta 3\n\t"
+             "mov %0, %%sp" : : "r"(stackpointer));
+
+#define GST_ARCH_CALL(target) \
+    __asm__( "call %0,0\n\t"
+             "nop" : : "r"(target) );
+
+#define GST_ARCH_PRESETJMP() \
+    __asm__( "ta 3" );
+
+// Need to get more information about the stackframe format
+// and get the fields more correct.  Check GDB sources maybe?
+
+#define GST_ARCH_SETUP_STACK(sp) sp -= 4
+
+#endif /* __GST_GSTSPARC_H__ */