From 0622e9e391fba34948d5c11adbd3be7b5470ff2c Mon Sep 17 00:00:00 2001
From: David Schleef <ds@schleef.org>
Date: Thu, 15 Apr 2004 03:20:23 +0000
Subject: [PATCH] gst/gstcpu.c: Add workaround for gcc-3.2 generating bad code
 around the cpu detection asm code.

Original commit message from CVS:
* gst/gstcpu.c: (gst_cpuid_i386): Add workaround for gcc-3.2
generating bad code around the cpu detection asm code.
---
 ChangeLog    | 5 +++++
 gst/gstcpu.c | 5 ++++-
 2 files changed, 9 insertions(+), 1 deletion(-)

diff --git a/ChangeLog b/ChangeLog
index 81d1336f0e..2e35ba6a77 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,8 @@
+2004-04-14  David Schleef  <ds@schleef.org>
+
+	* gst/gstcpu.c: (gst_cpuid_i386): Add workaround for gcc-3.2
+	generating bad code around the cpu detection asm code.
+
 2004-04-14  Thomas Vander Stichele  <thomas at apestaart dot org>
 
 	* tools/gst-inspect.c: (print_element_info):
diff --git a/gst/gstcpu.c b/gst/gstcpu.c
index 10d3e2f35e..279fd283bf 100644
--- a/gst/gstcpu.c
+++ b/gst/gstcpu.c
@@ -69,7 +69,10 @@ gst_cpuid_i386 (int x, unsigned long *eax, unsigned long *ebx,
 {
   unsigned long regs[4];
 
-asm ("  cpuid\n" "  movl %%eax, %0\n" "  movl %%ebx, %1\n" "  movl %%ecx, %2\n" "  movl %%edx, %3\n":"=o" (regs[0]),
+  asm (
+      /* GCC-3.2 (and possibly others) don't clobber ebx properly,
+       * so we save/restore it directly. */
+"  pushl %%ebx\n" "  cpuid\n" "  movl %%eax, %0\n" "  movl %%ebx, %1\n" "  movl %%ecx, %2\n" "  movl %%edx, %3\n" "  popl %%ebx\n":"=o" (regs[0]),
       "=o" (regs[1]),
       "=o" (regs[2]), "=o" (regs[3])
 :    "a" (x)